Gitiles
Code Review Sign In
gerrit-public.fairphone.software / platform / external / llvm / 38ada868f24b639512e4cfe07871ccea05e09f1a / lib / Target / X86 / X86ISelLowering.cpp
  1. 38ada86 Update tailcall code to include inline attribute operand for memcpy. by Arnold Schwaighofer · 17 years ago
  2. cc41586 Much improved pic jumptable codegen: by Evan Cheng · 17 years ago
  3. f1ba1ca Move the LowerMEMCPY and LowerMEMCPYCall to a common place. by Rafael Espindola · 17 years ago
  4. 03e6c70 Fix PR1763 by allowing the 'q' constraint to work with 64-bit regs on x86-64. by Chris Lattner · 17 years ago
  5. a9d641e Unbreak tailcall opt. by Evan Cheng · 17 years ago
  6. 9df7dc5 Missing a getNumOperands check. by Evan Cheng · 17 years ago
  7. e0703c8 Make ARM and X86 LowerMEMCPY identical by moving the isThumb check into getMaxInlineSizeThreshold by Rafael Espindola · 17 years ago
  8. fc05f40 Make ARM an X86 memcpy expansion more similar to each other. by Rafael Espindola · 17 years ago
  9. 25f1d08 Make i64=expand_vector_elt(v2i64) work in 32-bit mode. by Dale Johannesen · 17 years ago
  10. 8d26e59 Add missing MMX PSUBQ. by Dale Johannesen · 17 years ago
  11. 3c3ddb3 Enable more fold (sext (load x)) -> (sext (truncate (sextload x))) by Evan Cheng · 17 years ago
  12. e127a73 Avoid doing something dumb like rewriting using a 64-bit iv in 32-bit mode. by Evan Cheng · 17 years ago
  13. 2bd122c Loosen up iv reuse to allow reuse of the same stride but a larger type when truncating from the larger type to smaller type is free. by Evan Cheng · 17 years ago
  14. 61c7ef3 Allow for copysign having f80 second argument. Fixes 5550319. by Dale Johannesen · 17 years ago
  15. 5c0d6ed Add support for byval function whose argument is not 32 bit aligned. by Rafael Espindola · 17 years ago
  16. 7ef1a4b Change fp to sint legalization on x86-32 to do 2 x i32 by Chris Lattner · 17 years ago
  17. 2ff75ee fix some funny indentation, add comments. by Chris Lattner · 17 years ago
  18. c274f54 Check for invalid cc's in f80 select. by Dale Johannesen · 17 years ago
  19. 448175f Correction to tail call optimization code. The new return address by Arnold Schwaighofer · 17 years ago
  20. 87c8935 LowerFP_TO_SINT must not create a stack object if it's not needed. by Evan Cheng · 17 years ago
  21. 3644601 Unbreak x86-64. by Evan Cheng · 17 years ago
  22. 92226dd Correcting the corrections. Bad bad baaad emacs! by Arnold Schwaighofer · 17 years ago
  23. 48abc5c Corrected many typing errors. And removed 'nest' parameter handling by Arnold Schwaighofer · 17 years ago
  24. 2e4d675 Due to the new tail call optimization, trampolines can no by Duncan Sands · 17 years ago
  25. f0d0089 Mark vector ctpop, cttz, and ctlz as Expand on x86. by Dan Gohman · 17 years ago
  26. f96e4de Set ISD::FPOW to Expand. by Dan Gohman · 17 years ago
  27. c85e171 Added tail call optimization to the x86 back end. It can be by Arnold Schwaighofer · 17 years ago
  28. 3f41d66 Bug fix. X86 was emitting redundant setcc and test instructions before a conditional move. by Evan Cheng · 17 years ago
  29. 525178c Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to by Dan Gohman · 17 years ago
  30. afa98bc Not needed any more. by Evan Cheng · 17 years ago
  31. e5f6204 Enabling new condition code modeling scheme. by Evan Cheng · 17 years ago
  32. 068317b Refactor the memcpy lowering for the x86 target. by Rafael Espindola · 17 years ago
  33. 2f42901 Enable codegen for long double abs, sin, cos by Dale Johannesen · 17 years ago
  34. 1a35edb translateX86CC updates the last two operands. by Evan Cheng · 17 years ago
  35. a37c9f7 When both x/y and x%y are needed (x and y both scalar integer), compute by Dan Gohman · 17 years ago
  36. c3b0b5c Move the setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand) and by Dan Gohman · 17 years ago
  37. 0488db9 Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after by Evan Cheng · 17 years ago
  38. a5a403d Add support on x86 for having Legalize lower ISD::LOCATION to ISD::DEBUG_LOC by Dan Gohman · 17 years ago
  39. 9b4baf1 claim that "st" is from the 80-bit register file. This causes x87-using inline by Chris Lattner · 17 years ago
  40. f1fc3a8 Fix PR 1681. When X86 target uses +sse -sse2, by Dale Johannesen · 17 years ago
  41. a37ac9f Don't add a default STACK_ALIGN (use the generic ABI alignment) by Rafael Espindola · 17 years ago
  42. 1242d28 small cleanup: use LowerMemArgument in LowerFastCCArguments also by Rafael Espindola · 17 years ago
  43. 73328d1 More long double fixes. x86_64 should build now. by Dale Johannesen · 17 years ago
  44. 5f6913c Emit integer x<1 as x<=0, as comparisons with zero (now includeing by Dan Gohman · 17 years ago
  45. 9e3d3ab Remove the assumption that FP's are either float or by Dale Johannesen · 17 years ago
  46. 7effac5 Add support for functions with byval arguments on x86 by Rafael Espindola · 17 years ago
  47. 3f6eb74 Add APInt interfaces to APFloat (allows directly by Dale Johannesen · 17 years ago
  48. f7331b3 Fold the adjust_trampoline intrinsic into by Duncan Sands · 17 years ago
  49. 43421b3 Next round of APFloat changes. by Dale Johannesen · 17 years ago
  50. 3825262 Reapply r41578 with proper fix by Anton Korobeynikov · 17 years ago
  51. 1b5dcc3 Initial support for calling functions with byval arguments on x86-64 by Rafael Espindola · 17 years ago
  52. eaf0894 Enhance APFloat to retain bits of NaNs (fixes oggenc). by Dale Johannesen · 17 years ago
  53. f04afdb Change LegalFPImmediates to use APFloat. by Dale Johannesen · 17 years ago
  54. ee46574 Move getX86RegNum into X86RegisterInfo and use it by Duncan Sands · 17 years ago
  55. 44c8265 Add a comment about using libc memset/memcpy or generating inline code. by Rafael Espindola · 17 years ago
  56. 6b83b5d call libc memcpy/memset if array size is bigger then threshold. by Rafael Espindola · 17 years ago
  57. 48884cd rename isOperandValidForConstraint to LowerAsmOperandForConstraint, by Chris Lattner · 17 years ago
  58. 21485be Partial implementation of calling functions with byval arguments: by Rafael Espindola · 17 years ago
  59. a2780e1 Move ReturnAddrIndex variable to X86MachineFunctionInfo structure. This fixed by Anton Korobeynikov · 17 years ago
  60. 1291438 Fix a typo pointd out by Maarten ter Huurne. by Evan Cheng · 17 years ago
  61. c59e521 Increase efficiency of sign_extend_inreg by using subregisters for truncation. As the README suggests sign_extend_subreg is selected to (sext(trunc)). by Christopher Lamb · 17 years ago
  62. 594d37e propagate struct size and alignment of byval arguments to the DAG by Rafael Espindola · 17 years ago
  63. 5411a39 long double 9 of N. This finishes up the X86-32 bits by Dale Johannesen · 17 years ago
  64. a996d52 Long double patch 7 of N, unless I lost count:). by Dale Johannesen · 17 years ago
  65. 59a5873 Long double patch 4 of N: initial x87 implementation. by Dale Johannesen · 17 years ago
  66. 7f55fcb Fix the alignment requirements of several unpck and shuf instructions. by Dan Gohman · 17 years ago
  67. 5278784 Can't handle offset and scale if rip-relative addressing is to be used. by Evan Cheng · 17 years ago
  68. 4ebcc8c This isn't safe when there are uses of load's chain result. by Evan Cheng · 17 years ago
  69. b116fac Trampoline codegen support for X86-32. by Duncan Sands · 17 years ago
  70. d300622 Re-apply 40504, but with a fix for the segfault it caused in oggenc: by Dan Gohman · 17 years ago
  71. 3e22947 Reverting 40504 for now. It's breaking oggenc. by Evan Cheng · 17 years ago
  72. d328383 Remove X86ISD::LOAD_PACK and X86ISD::LOAD_UA and associated code from the by Dan Gohman · 17 years ago
  73. a394117 Use movaps to load a v4f32 build_vector of all-constant values into a by Dan Gohman · 17 years ago
  74. 275769a Fix some uses of dyn_cast to be uses of cast. by Dan Gohman · 17 years ago
  75. d4d01b7 Fix custom lowering of SSE FXOR. by Evan Cheng · 17 years ago
  76. 2365f51 Long live the exception handling! by Anton Korobeynikov · 17 years ago
  77. 2038252 Define non-intrinsic instructions for vector min, max, sqrt, rsqrt, and rcp, by Dan Gohman · 17 years ago
  78. 4304bcc Proper flag __alloca call by Anton Korobeynikov · 17 years ago
  79. e377d4d Refactor X87 instructions. As a side effect, all their names are changed. by Dale Johannesen · 17 years ago
  80. 849f214 Fix for PR 1505 (and 1489). Rewrite X87 register by Dale Johannesen · 17 years ago
  81. a72cb0e No vector fneg. by Evan Cheng · 17 years ago
  82. 0db5862 Type of vector extract / insert index operand should be iPTR. by Evan Cheng · 17 years ago
  83. 7f32156 Generalize MVT::ValueType and associated functions to be able to represent by Dan Gohman · 17 years ago
  84. ea859be Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from by Dan Gohman · 17 years ago
  85. 52387be If a function is vararg, never pass inreg arguments in registers. Thanks to by Chris Lattner · 17 years ago
  86. 49892af Look for VECTOR_SHUFFLE that's identity operation on either LHS or RHS. This can happen before DAGCombiner catches it. by Evan Cheng · 17 years ago
  87. a9e64f6 Revert patch. It regresses: by Bill Wendling · 17 years ago
  88. e81369f Fix a failure to bit_convert from integer GPR to MMX register. by Bill Wendling · 17 years ago
  89. 51eaa86 Rename MVT::getVectorBaseType to MVT::getVectorElementType. by Dan Gohman · 17 years ago
  90. fdbe720 fix x86-64 mmx calling convention for real, which passes in integer gprs. by Chris Lattner · 17 years ago
  91. 6b7c21c fix mmx handling bug by Chris Lattner · 17 years ago
  92. 237898a Add explicit qualification for namespace MVT members. by Dan Gohman · 17 years ago
  93. fa0f77d Use MVT::FIRST_VECTOR_VALUETYPE and MVT::LAST_VECTOR_VALUETYPE. by Dan Gohman · 17 years ago
  94. 213d2cf Fix a bogus check that prevented folding VECTOR_SHUFFLE to UNDEF; add an optimization to fold VECTOR_SHUFFLE to a zero vector. by Evan Cheng · 17 years ago
  95. 07c70cd This is the correct fix for PR1427. This fixes mmx-shuffle.ll and doesn't by Chris Lattner · 17 years ago
  96. f840202 Revert patch for PR1427. It breaks almost all vector tests. by Anton Korobeynikov · 17 years ago
  97. da66472 Fix PR1427 and test/CodeGen/X86/mmx-shuffle.ll by Chris Lattner · 17 years ago
  98. 709fd41 fix subtle bugs in inline asm operand selection by Chris Lattner · 17 years ago
  99. dc43a88 Fix two classes of bugs: by Chris Lattner · 18 years ago
  100. ce3b465 Emit correct register move information in eh frames for X86. This allows Shootout-C++/except to pass on x86/linux by Anton Korobeynikov · 18 years ago