- 3d01fc7 Initial support for the CMake build system. by Oscar Fuentes · 16 years ago
- cd4c73a Add helper function to get a 32-bit floating point constant. No functionality change. by Bill Wendling · 16 years ago
- 14743e8 explain what earlyclobber actually is. by Chris Lattner · 16 years ago
- 743922e Fold immediates into X86 shifts with fast isel. This generates: by Chris Lattner · 16 years ago
- 3bdf5fe Factor out code into HandleVirtRegDef, for consistency with by Dan Gohman · 16 years ago
- 4893c06 Instead of building a list and sorting it just to find a maximum element, by Dan Gohman · 16 years ago
- 134eb73 Fetch the starting index of the block when assigning intervals. This gets live-in indices by Owen Anderson · 16 years ago
- ca19a3f don't print GlobalAddressSDNode's with an offset of zero as "foo0". by Chris Lattner · 16 years ago
- e306b3d add a note by Chris Lattner · 16 years ago
- 8e4018e Update VS projects. Change some class to struct for coherency. by Cedric Venet · 16 years ago
- 79faf61 Shorten and rearrange data fields to save a word of memory. Per review feedback. by Dale Johannesen · 16 years ago
- f95f945 Implement review feedback from Devang: make use by Duncan Sands · 16 years ago
- 34d8f75 Teach coalescer about earlyclobber bits. Check bits for preferred register. by Dale Johannesen · 16 years ago
- 5e8d9de Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on. by Evan Cheng · 16 years ago
- 4070e60 Clean up the test. by Evan Cheng · 16 years ago
- 91a23c8 No need to print function stubs for Mac OS X 10.5 and up. Linker will handle it. by Evan Cheng · 16 years ago
- 0333920 80 column violation. by Evan Cheng · 16 years ago
- 7e8ef60 Fix a FastISel GlobalVariable CSE bug. by Dan Gohman · 16 years ago
- fee2d69 Continue after removing the current MI. by Evan Cheng · 16 years ago
- 2ff7fd1 Refactor X86SelectConstAddr, folding it into X86SelectAddress. This by Dan Gohman · 16 years ago
- d6bd733 Make earlyclobber stuff work when virtual regs by Dale Johannesen · 16 years ago
- 135ccbd Prevent warning about conversion from 64-bit to 32-bit by (yuck) casting... by Bill Wendling · 16 years ago
- 015b714 Now that ConstantSDNode doesn't hold an APInt, by Dan Gohman · 16 years ago
- ed87180 Added static methods to APSInt: getMinValue and getMaxValue. by Ted Kremenek · 16 years ago
- 20580a1 Re-materalized definition instructions may be dead. Whack them. by Evan Cheng · 16 years ago
- 6f42665 backing out my last commit, it was not intended to go on the trunk by Gabor Greif · 16 years ago
- 6c2c95d first shot at removing Use::Val untested, Use::swap() is definitely not done yet by Gabor Greif · 16 years ago
- 210fada Turn on the AddReadAttrs pass. by Duncan Sands · 16 years ago
- a01febb Add test for improvement of readonly to readnone, by Duncan Sands · 16 years ago
- 0cb5b37 Turn on these tests! by Duncan Sands · 16 years ago
- acdb2ee Remove the MarkModRef pass (use AddReadAttrs instead). by Duncan Sands · 16 years ago
- 9f07a29 Add a new pass AddReadAttrs which works out which functions by Duncan Sands · 16 years ago
- e763f7e Test the callgraph directly for the missing edge. by Duncan Sands · 16 years ago
- e65d39a Teach -callgraph to always print the callgraph (as the by Duncan Sands · 16 years ago
- fa48f94 Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis by Dale Johannesen · 16 years ago
- 4fe0fe8 splitLoop does not handle split condition EQ. Fixes PR 2805 by Devang Patel · 16 years ago
- 3589308 Address-mode folding for X86FastISel. It's pretty basic, but it by Dan Gohman · 16 years ago
- 670ed09 Decrementing the iterator here could be wrong if the worklist is empty after the "erase". by Bill Wendling · 16 years ago
- 3d0a9a3 Try to place hoisted instructions befoe icmp instruction. by Devang Patel · 16 years ago
- 841ee1a Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo. by Evan Cheng · 16 years ago
- 1fbc3cd Simplify this code. The FastISel class has its own TD member. by Dan Gohman · 16 years ago
- e251b15 Don't consider instructions with implicit physical register by Dan Gohman · 16 years ago
- 6a0fd93 Upgrade doxygen. by Tanya Lattner · 16 years ago
- ee2e403 Add a new "fast" scheduler. This is currently basically just a by Dan Gohman · 16 years ago
- bc4707a Preliminary support for systems which require changing JIT memory regions privilege from read / write to read / executable. by Evan Cheng · 16 years ago
- 057d0c3 Duh. Default to ARMCC::AL (always). by Evan Cheng · 16 years ago
- 6d63a72 Clean up. by Evan Cheng · 16 years ago
- 3f7eb8e Cosmetic. by Evan Cheng · 16 years ago
- b5b6ec6 FastISel: For calls, prefer using the callee's address as a constant by Dan Gohman · 16 years ago
- 91aac10 Add a bit to mark operands of asm's that conflict by Dale Johannesen · 16 years ago
- 870e4be Unallocatable registers do not have live intervals. by Evan Cheng · 16 years ago
- 48fbc2d Do not hoist instruction above branch condition. The instruction may use branch condition. by Devang Patel · 16 years ago
- 0062295 Do not ignore iv uses outside the loop. by Devang Patel · 16 years ago
- 442b1aa Fix comments, help messages. by Devang Patel · 16 years ago
- 5993258 Don't worry about clobbering physical register defs that aren't used. by Dan Gohman · 16 years ago
- 7fd7ca4 Fix addrmode1 instruction encodings; fix bx_ret encoding. by Evan Cheng · 16 years ago
- 29c57c3 Specify instruction encoding using range list to avoid endianess issues. by Evan Cheng · 16 years ago
- bc95b23 Add instruction names as comments to InstBits entries. by Evan Cheng · 16 years ago
- 682d5a8 Simplify and generalize X86DAGToDAGISel::CanBeFoldedBy, and draw by Dan Gohman · 16 years ago
- d3ead43 Add a new MachineInstr-level DCE pass. It is very simple, and is intended to by Dan Gohman · 16 years ago
- 7795932 Add trampoline support to PPC. GCC simply calls the "__trampoline_setup" by Bill Wendling · 16 years ago
- d9424ed Fix cut-n-pasto. by Devang Patel · 16 years ago
- 1cd3327 When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes. by Evan Cheng · 16 years ago
- f944741 Remove. by Devang Patel · 16 years ago
- 2d7551c Add -O1, -O2 and -O3 that matches llvm-gcc's -O1, -O2 and -O3 respectively. by Devang Patel · 16 years ago
- 50284d8 Change SelectionDAG::getConstantPool to always set the alignment of the by Dan Gohman · 16 years ago
- 056292f Reverting r56249. On further investigation, this functionality isn't needed. by Bill Wendling · 16 years ago
- aed48bf Include the alignment value when displaying ConstantPoolSDNodes. by Dan Gohman · 16 years ago
- 9468a9b - Change "ExternalSymbolSDNode" to "SymbolSDNode". by Bill Wendling · 16 years ago
- 05ae983 Fix these comments to reflect current reality. Surprisingly, by Dan Gohman · 16 years ago
- 70ff4cf Finally re-apply r46959. This is made feasible by the combination by Dan Gohman · 16 years ago
- 81b28ce Improve instcombine's handling of integer min and max in two ways: by Dan Gohman · 16 years ago
- 19a341a AllocateRWXMemory -> AllocateRWX. by Evan Cheng · 16 years ago
- 793df07 FCmpInst predicates UNO, ORD, FALSE, and TRUE are commutative. by Dan Gohman · 16 years ago
- 10dd39b Fix test to account for no more whitespace and that one of the matches is the by Bill Wendling · 16 years ago
- 4fc2b73 Remove space that was forgotten.` by Bill Wendling · 16 years ago
- 1937e2f Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls by Dan Gohman · 16 years ago
- c7e42fd Fix spacing in the grep line for this test, following the recent by Dan Gohman · 16 years ago
- fb2bbbe Re-enables the new vector select in the bitcode reader, by modifying the by Dan Gohman · 16 years ago
- fd6edef Teach ScalarEvolution to consider loop preheaders in the search for by Dan Gohman · 16 years ago
- 99500ae Live intervals for live-in registers should begin at the beginning of a basic block, not at the first by Owen Anderson · 16 years ago
- ad7321f Teach LSR to optimize away SMAX operations for tripcounts in common by Dan Gohman · 16 years ago
- 89e9ed3 Extract optimization pass selection code from llvm-gcc into a separate routine. by Devang Patel · 16 years ago
- b3d7299 Fixed Bug 2751 http://llvm.org/bugs/show_bug.cgi?id=2751 by Bruno Cardoso Lopes · 16 years ago
- 5eb0cec Re-enable SelectionDAG CSE for calls. It matters in the case of by Dan Gohman · 16 years ago
- f19063b Added testcase for bswap allegrexel intrinsic by Bruno Cardoso Lopes · 16 years ago
- 38197fe End of the GlobalsModRef experiment. by Duncan Sands · 16 years ago
- 0d58eb6 Update the LLVM polygen grammar for recent language changes: by Dan Gohman · 16 years ago
- b6d1f39 Fix documentation for these functions; they do not only modify users within the by Nick Lewycky · 16 years ago
- 25f34a3 Correctly update kill infos after extending a live range and merge 2 val#'s; fix 56165 - do not mark val# copy field if the copy does not define the val#. by Evan Cheng · 16 years ago
- 206b59a Add "sample" documentation to sample project. by Nick Lewycky · 16 years ago
- 8dae138 Fix WriteAsOperand to not emit a leading space character. Adjust by Dan Gohman · 16 years ago
- e009180 adjust last patch per review feedback by Dale Johannesen · 16 years ago
- bfe2f40 minor correction by Gabor Greif · 16 years ago
- 014278e Remove isImm(), isReg(), and friends, in favor of by Dan Gohman · 16 years ago
- b8ca4ff Fix PR2792: treat volatile loads as writing memory somewhere. by Duncan Sands · 16 years ago
- 2aa0e64 Fix random abort. by Evan Cheng · 16 years ago
- 095cc29 Define CallSDNode, an SDNode subclass for use with ISD::CALL. by Dan Gohman · 16 years ago
- e7de7e3 Typo. by Evan Cheng · 16 years ago
- be3034c Rely on instruction format to determine so_reg operand for now. by Evan Cheng · 16 years ago