1. 47f3513 Initial implementation of 'fence' instruction, the new C++0x-style replacement for llvm.memory.barrier. by Eli Friedman · 13 years ago
  2. db125cf land David Blaikie's patch to de-constify Type, with a few tweaks. by Chris Lattner · 13 years ago
  3. 5427ede Check register class matching instead of width of type matching by Eric Christopher · 13 years ago
  4. 3ff2551 Don't emit a bit test if there is only one case the test can yield false. A simple SETNE is sufficient. by Benjamin Kramer · 13 years ago
  5. fc6d3a4 Convert InsertValueInst and ExtractValueInst APIs to use ArrayRef. by Jay Foad · 13 years ago
  6. 3339084 Add an intrinsic and codegen support for fused multiply-accumulate. The intent by Cameron Zwarich · 13 years ago
  7. 3492a4a Apparently we can't expect a BinaryOperator here. by Benjamin Kramer · 13 years ago
  8. 9c64030 Emit a more efficient magic number multiplication for exact sdivs. by Benjamin Kramer · 13 years ago
  9. 9da9934 Introduce "expect" intrinsic instructions. by Jakub Staszak · 13 years ago
  10. 5244c4c Remove getRegClassForInlineAsmConstraint and all dependencies. by Eric Christopher · 13 years ago
  11. f792fa9 Distinguish early clobber output operands from clobbered registers. by Jakob Stoklund Olesen · 13 years ago
  12. c6341e6 When promoting the vector elements in CopyToParts, use vector trunc by Nadav Rotem · 13 years ago
  13. 7cc2b07 Introduce MachineBranchProbabilityInfo class, which has similar API to by Jakub Staszak · 13 years ago
  14. 79c890f Add TargetRegisterInfo::getRawAllocationOrder(). by Jakob Stoklund Olesen · 13 years ago
  15. 9a76733 Add one more argument to the prefetch intrinsic to indicate whether it's a data by Bruno Cardoso Lopes · 13 years ago
  16. b05f14b Improve the generated code by getCopyFromPartsVector for promoted integer types. by Nadav Rotem · 13 years ago
  17. 471e422 Add a parameter to CCState so that it can access the MachineFunction. by Eric Christopher · 13 years ago
  18. 0b66636 TypeLegalizer: Add support for passing of vector-promoted types in registers (copyFromParts/copyToParts). by Nadav Rotem · 13 years ago
  19. e0b42c0 Add a TODO about memory operands. by Eric Christopher · 13 years ago
  20. 100c833 Have LowerOperandForConstraint handle multiple character constraints. by Eric Christopher · 13 years ago
  21. 9aaa02a Allow bitcasts between valid types of the same size and vector by Eric Christopher · 13 years ago
  22. 2338575 Preserve debug info during iSel by keeping DanglingDebugInfoMap live until end of function. by Devang Patel · 14 years ago
  23. 9db20f3 Eliminate some temporary variables, and don't call getByValTypeAlignment by Chris Lattner · 14 years ago
  24. 227dfdb Preserve debug info for unused zero extended boolean argument. Radar 9422775. by Devang Patel · 14 years ago
  25. 3fa8283 Make codegen able to handle values of empty types. This is one way by Rafael Espindola · 14 years ago
  26. 61512ba Give the 'eh.sjlj.dispatchsetup' intrinsic call the value coming from the setjmp by Bill Wendling · 14 years ago
  27. 7f33d67 Disable my little CopyToReg argument hack with fast-isel. rdar://problem/9413587 . by Eli Friedman · 14 years ago
  28. cef81b7 Look through struct wrapped types for inline asm statments. by Eric Christopher · 14 years ago
  29. ce1cdac 80 col violations. by Evan Cheng · 14 years ago
  30. 23d3243 Avoid extra vreg copies for arguments passed in registers. Specifically, this can make MachineCSE more effective in some cases (especially in small functions). PR8361 / part of rdar://problem/8259436 . by Eli Friedman · 14 years ago
  31. 06104e3 A dbg.declare may not be in entry block, even if it is referring to an incoming argument. However, It is appropriate to emit DBG_VALUE referring to this incoming argument in entry block in MachineFunction. by Devang Patel · 14 years ago
  32. 7a2bdde Fix a ton of comment typos found by codespell. Patch by by Chris Lattner · 14 years ago
  33. c3e4e59 Avoid excess precision issues that lead to generating host-compiler-specific code. by Chris Lattner · 14 years ago
  34. 4da0c7c Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap is lowered into a call to the specified trap function at sdisel time. by Evan Cheng · 14 years ago
  35. f05b1dc Revamp the SjLj "dispatch setup" intrinsic. by Bill Wendling · 14 years ago
  36. c249e48 Add comments. by Evan Cheng · 14 years ago
  37. 8380c03 Assign node order numbers to results of call instruction lowering. This should improve src line debug info when sdisel is used. rdar://9199118 by Evan Cheng · 14 years ago
  38. 7d706ed Turn SelectionDAGBuilder::GetRegistersForValue into a local function. by Benjamin Kramer · 14 years ago
  39. 7bbf0ee Move more logic into getTypeForExtArgOrReturn. by Cameron Zwarich · 14 years ago
  40. 4457968 Rename getTypeForExtendedInteger() to getTypeForExtArgOrReturn(). by Cameron Zwarich · 14 years ago
  41. ebe8173 The x86-64 ABI says that a bool is only guaranteed to be sign-extended to a byte by Cameron Zwarich · 14 years ago
  42. 8df6bf5 Don't recompute something that we already have in a local variable. by Cameron Zwarich · 14 years ago
  43. 778583a Replace -dag-chain-limit flag with constant. It has survived a release cycle without being touched, so no longer needs to pollute the hidden-help text. by Andrew Trick · 14 years ago
  44. 95771af Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS. by Owen Anderson · 14 years ago
  45. 3fc8317 Fix formatting of debug helper string. by Jim Grosbach · 14 years ago
  46. e1497b9 Refactor the LiveOutInfo interface into a few methods on FunctionLoweringInfo by Cameron Zwarich · 14 years ago
  47. 4ecc82e Roll out r126169 and r126170 in an attempt to fix the selfhost bot. by Cameron Zwarich · 14 years ago
  48. 92efda7 Merge information about the number of zero, one, and sign bits of live-out registers by Cameron Zwarich · 14 years ago
  49. a778f5c Do not lose debug info of an inlined function argument even if the argument is only used through GEPs. by Devang Patel · 14 years ago
  50. 1646953 Roll out r125794 to help diagnose the llvm-gcc-i386-linux-selfhost failure. by Cameron Zwarich · 14 years ago
  51. a4defc0 Do not lose debug info of an inlined function argument even if the argument is only used through GEPs. by Devang Patel · 14 years ago
  52. 2ca5c86 convert ConstantVector::get to use ArrayRef. by Chris Lattner · 14 years ago
  53. 7583190 revert my ConstantVector patch, it seems to have made the llvm-gcc by Chris Lattner · 14 years ago
  54. 283c8ca Switch ConstantVector::get to use ArrayRef instead of a pointer+size by Chris Lattner · 14 years ago
  55. e075118 Revisit my fix for PR9028: the issue is that DAGCombine was by Chris Lattner · 14 years ago
  56. 915eeb4 when legalizing extremely wide shifts, make sure that by Chris Lattner · 14 years ago
  57. d302773 fix visitShift to properly zero extend the shift amount if the provided operand by Chris Lattner · 14 years ago
  58. ed4efd3 Fix build with stdcxx by using llvm::next. Patch by Joerg Sonnenberger! by Nick Lewycky · 14 years ago
  59. 8f31428 by Devang Patel · 14 years ago
  60. a3ee3ef Speculatively revert r124138. by Devang Patel · 14 years ago
  61. 224a180 Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic. by Devang Patel · 14 years ago
  62. 16c29b5 Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. by Anton Korobeynikov · 14 years ago
  63. c9df025 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. by Jakob Stoklund Olesen · 14 years ago
  64. 358de24 Use an IndexedMap for LiveOutRegInfo to hide its dependence on TargetRegisterInfo::FirstVirtualRegister. by Jakob Stoklund Olesen · 14 years ago
  65. c36b706 Do not model all INLINEASM instructions as having unmodelled side effects. by Evan Cheng · 14 years ago
  66. 5e8b833 Add ARM patterns to match EXTRACT_SUBVECTOR nodes. by Bob Wilson · 14 years ago
  67. d08e5b4 Avoid zero extend bit test operands to pointer type if all the masks fit in by Evan Cheng · 14 years ago
  68. f1b4eaf rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for by Chris Lattner · 14 years ago
  69. d5b4db9 reduce indentation by using continue, no functionality change. by Chris Lattner · 14 years ago
  70. 40f8f62 PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and by Jay Foad · 14 years ago
  71. afeaae7 If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. by Devang Patel · 14 years ago
  72. de189be add TLI support indicating that jumps are more expensive than logical operations by Chris Lattner · 14 years ago
  73. bf17cfa Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. by Wesley Peck · 14 years ago
  74. ce750f0 Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization. by Benjamin Kramer · 14 years ago
  75. b9e6fe1 Removing the useless test that I added recently. It was meant as an example, but not complicated enough to merit another test. by Andrew Trick · 14 years ago
  76. 7730318 Bug 8621 fix - pointer cast stripped from inline asm constraint argument. by John Thompson · 14 years ago
  77. f06202f typo (4th checkin for one fix) by Andrew Trick · 14 years ago
  78. de91f3c Fixes PR8287: SD scheduling time. The fix is a failsafe that prevents by Andrew Trick · 14 years ago
  79. a29aae7 tidy up. by Chris Lattner · 14 years ago
  80. efb8a9d Remove the memmove->memcpy optimization from CodeGen. MemCpyOpt does this. by Dan Gohman · 14 years ago
  81. 1440e8b Inside the calling convention logic LocVT is always a simple by Duncan Sands · 14 years ago
  82. 8bc9ef7 If value map does not have register for an argument then try to find frame index before giving up. by Devang Patel · 14 years ago
  83. a90b305 Use frameindex, if available, as a last resort to emit debug info for a parameter. by Devang Patel · 14 years ago
  84. 44ab89e Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support. by John Thompson · 14 years ago
  85. 1de4aa9 Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches by Dale Johannesen · 14 years ago
  86. 7e13efa Assign source ordering to nodes created for StoreInst. by Devang Patel · 14 years ago
  87. 391b43b X86: Base _fltused on the FunctionType of the called value instead of the potentially null "CalledFunction". Thanks Duncan! by Michael J. Spencer · 14 years ago
  88. dd0a00a CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args. by Michael J. Spencer · 14 years ago
  89. f96e4bd Make CodeGen TBAA-aware. by Dan Gohman · 14 years ago
  90. e4ad387 Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any by Jim Grosbach · 14 years ago
  91. 84ac4d5 X86-Windows: Emit an undefined global __fltused symbol when targeting Windows by Michael J. Spencer · 14 years ago
  92. e70c526 Whitespace! by Michael J. Spencer · 14 years ago
  93. 0dadb15 ComputeLinearIndex doesn't need its TLI argument. by Dan Gohman · 14 years ago
  94. 27f46cd Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case. by Devang Patel · 14 years ago
  95. fb4032f typo by Gabor Greif · 14 years ago
  96. 6bf263b fix typo by Chris Lattner · 14 years ago
  97. 0488fb6 Massive rewrite of MMX: by Dale Johannesen · 14 years ago
  98. 2622f46 When isel is emitting instructions for an x86 target without CMOV, the CFG is by Jakob Stoklund Olesen · 14 years ago
  99. 5458474 Fix for test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll crash. by John Thompson · 14 years ago
  100. 1f40960 Get rid of pop_macro warnings on MSVC. by Michael J. Spencer · 14 years ago