1. 490ad08 Generate LA and ADDIS when possible. by Chris Lattner · 19 years ago
  2. 860e886 Add an initial hack at legalizing GlobalAddress into the appropriate nodes by Chris Lattner · 19 years ago
  3. bae5b3c LI could theoretically be used for the lo-part of a global address, just like by Chris Lattner · 19 years ago
  4. 422b0ce Patch to clean up function call pseudos and support the BLA instruction, by Nate Begeman · 19 years ago
  5. 6df2507 add support for branch on ordered/unordered. by Chris Lattner · 19 years ago
  6. 6e61ca6 autogen undef by Chris Lattner · 19 years ago
  7. 3075a4e Allow pseudos to have patterns, no functionality change by Chris Lattner · 19 years ago
  8. 9c73f09 Autogen fsel by Chris Lattner · 19 years ago
  9. e6115b3 Autogen a few new ppc-specific nodes by Chris Lattner · 19 years ago
  10. dabb829 Instead of aborting if not a case we can handle specially, break out and by Chris Lattner · 19 years ago
  11. ae1641c Match rotate. This does actually match the rotates in an rc5 cipher, but I by Nate Begeman · 19 years ago
  12. 12a9234 Add some more patterns for i64 on ppc by Nate Begeman · 19 years ago
  13. 5384214 Added InstrSchedClass to each of the PowerPC Instructions. by Jim Laskey · 19 years ago
  14. 2d5aff7 Write patterns for the various shl and srl patterns that don't involve by Nate Begeman · 19 years ago
  15. f6cd147 now that tblgen is smarter, use integers directly. This should help Andrew too by Chris Lattner · 19 years ago
  16. 8be1fa5 Convert these cases to patterns by Chris Lattner · 19 years ago
  17. 8d94832 Woo, it kinda works. We now generate this atrociously bad, but correct, by Nate Begeman · 19 years ago
  18. da32c9e Make a new reg class for 64 bit regs that aliases the 32 bit regs. This by Nate Begeman · 19 years ago
  19. 841d12d Fix the JIT encoding of LWA, LD, STD, and STDU. by Chris Lattner · 19 years ago
  20. 1d9d742 First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is by Nate Begeman · 19 years ago
  21. e0b2e63 Add a pattern for FSQRTS by Chris Lattner · 19 years ago
  22. f379997 Rename PowerPC*.td -> PPC*.td by Chris Lattner · 19 years ago
  23. 7cb6491 Add patterns for FP round/extend by Chris Lattner · 19 years ago
  24. 7b1fe15 These definitions have been moved to common code. by Chris Lattner · 19 years ago
  25. dff06f4 add patterns for float binops and fma ops by Chris Lattner · 19 years ago
  26. 43f07a4 another solution to the fsel issue. Instead of having 4 variants, just force by Chris Lattner · 19 years ago
  27. 867940d fsel can take a different FP type for the comparison and for the result. As such by Chris Lattner · 19 years ago
  28. 919c032 Modify the ppc backend to use two register classes for FP: F8RC and F4RC. by Chris Lattner · 19 years ago
  29. 67ab118 Add a bunch of patterns for F64 FP ops, add some more integer ops by Chris Lattner · 19 years ago
  30. c7a37a5 tblgen autogens this pattern now by Chris Lattner · 19 years ago
  31. 221e53c now that tblgen is smarter, this pattern is not needed. Also, tblgen by Chris Lattner · 19 years ago
  32. 79d0e9f Codegen ADD X, IMM -> addis/addi if needed. This implements PowerPC/fold-li.ll by Chris Lattner · 19 years ago
  33. e025574 add a patter for SUBFIC by Chris Lattner · 19 years ago
  34. 0648ccf Mark int binops as int-only, add FP binops. Mark FADD/FMUL as commutative but by Chris Lattner · 19 years ago
  35. a5cac6f Mark associative nodes as associative by Chris Lattner · 19 years ago
  36. 645992f Nate pointed out that mulh[us] are commutative as well. Thanks! by Chris Lattner · 19 years ago
  37. 6bcf1b7 expose commutativity information by Chris Lattner · 19 years ago
  38. cfc828a add support for missed eqv tests by Chris Lattner · 19 years ago
  39. 91da862 learn to codegen not as NOR instead of xoris/xori by Chris Lattner · 19 years ago
  40. 30e21a4 minor pattern shuffling by Chris Lattner · 19 years ago
  41. ea874f3 Teach the dag isel generator how to construct arbitrary immediates. The by Chris Lattner · 19 years ago
  42. 4ac85b3 disable this for now by Chris Lattner · 19 years ago
  43. 43ef131 give all operands names by Chris Lattner · 19 years ago
  44. 4345a4a Fix some issues exposed by more testing. XORIS had the wrong operands by Chris Lattner · 19 years ago
  45. c36d065 Fix some bugs noticed by new checking code by Chris Lattner · 19 years ago
  46. 043870d Teach the code generator that rlwimi is commutable if the rotate amount by Chris Lattner · 19 years ago
  47. 2eb2517 Introduce two new concepts: by Chris Lattner · 19 years ago
  48. b85c64c whitespace/comment changes, no functionality diffs by Chris Lattner · 19 years ago
  49. 47f01f1 Add a bunch of stuff needed for node type inference. Move 'BLR' down with by Chris Lattner · 19 years ago
  50. bfde080 add patterns for x?oris? by Chris Lattner · 19 years ago
  51. 3e63ead add patterns to the addi/addis/mulli etc instructions. Define predicates by Chris Lattner · 19 years ago
  52. d1cdc70 Add patterns for some new instructions, allowing the use of the ineg fragment. by Chris Lattner · 19 years ago
  53. e147ceb explicitly specify an operands list for patterns with inputs (e.g. neg) by Chris Lattner · 19 years ago
  54. 7cd09cf rearrange logical ops to group them together more consistently. by Chris Lattner · 19 years ago
  55. 6159fb2 Add AND/OR/XOR by Chris Lattner · 19 years ago
  56. 218a15d Add some initial patterns to simple binary instructions, though they by Chris Lattner · 19 years ago
  57. e3f1c97 The condition register being branched on may not be cr0, as such, print it. by Chris Lattner · 19 years ago
  58. 28b9cc2 allow code using mtcrf to assemble by Chris Lattner · 19 years ago
  59. a0df5d8 Remove operand type 'crbit', since it is no longer used by Nate Begeman · 19 years ago
  60. 8a2d3ca implement SELECT_CC fully for the DAG->DAG isel! by Chris Lattner · 19 years ago
  61. 6718f11 Fix JIT encoding of conditional branches by Nate Begeman · 19 years ago
  62. fdf8366 LFS/STFS load and store FP values, not integer ones. This change allows us by Chris Lattner · 19 years ago
  63. 2b54400 Split IMPLICIT_DEF into IMPLICIT_DEF_GPR and IMPLICIT_DEF_FP, so that the by Chris Lattner · 19 years ago
  64. 354df0a Remove some instructions we no longer generate by Nate Begeman · 19 years ago
  65. 1f24df6 Remove some regs that are not used. by Chris Lattner · 19 years ago
  66. 45fcb8f Fix operand numbers by marking variable arity nodes as such and by fixing by Chris Lattner · 19 years ago
  67. 394cd13 Fix JIT encoding of ppc mfocrf instruction; the operands were reversed by Nate Begeman · 19 years ago
  68. 2497e63 Support building non-PIC by Nate Begeman · 19 years ago
  69. adeb43d Generate mfocrf when targeting g5. Generate fsqrt/fsqrts when targetin g5. by Nate Begeman · 19 years ago
  70. fc87928 PPC "branch and link" instructions are branches in the PPC sense, but not by Chris Lattner · 19 years ago
  71. 14522e3 switch over the rest of the formats that use RC to use isDOT by Chris Lattner · 20 years ago
  72. 883059f Convert the XForm instrs and XSForm instruction over to use isDOT by Chris Lattner · 20 years ago
  73. a611ab7 convert over bform and iform instructions by Chris Lattner · 20 years ago
  74. 57226fb Convert over DForm and DSForm instructions by Chris Lattner · 20 years ago
  75. e19d0b1 Convert XLForm and XForm instructions over to use PPC64 when appropriate. by Chris Lattner · 20 years ago
  76. 5035cef Convert XO XS and XFX forms to use isPPC64 by Chris Lattner · 20 years ago
  77. 0bdc6f1 Turn PPC64 and VMX into classes that can be added to instructions instead of by Chris Lattner · 20 years ago
  78. 16ac709 Change codegen for setcc to read the bit directly out of the condition by Nate Begeman · 20 years ago
  79. 7bfba7d Implement multi-way branches through logical ops on condition registers. by Nate Begeman · 20 years ago
  80. ef7288c Add the necessary support to codegen condition register logical ops with by Nate Begeman · 20 years ago
  81. 7af0248 Initial support for allocation condition registers by Nate Begeman · 20 years ago
  82. 9f833d3 Implement bitfield clears Implement divide by negative power of two by Nate Begeman · 20 years ago
  83. 5eef9f3 ORo sets CR0 by Chris Lattner · 20 years ago
  84. 6b4ea2c Revert the previous patch, which I didn't mean to check in. by Chris Lattner · 20 years ago
  85. 26d4fdb Fix a minor bug (ORo didn't mark that it set CR0). by Chris Lattner · 20 years ago
  86. c7bd482 Add recording variants of ISD::AND and ISD::OR. This kills almost 1000 by Nate Begeman · 20 years ago
  87. cd08e4c Add rlwnm instruction for variable rotate by Nate Begeman · 20 years ago
  88. 815d6da Add support for MULHS and MULHU nodes by Nate Begeman · 20 years ago
  89. 178bb34 Add support for multiply-add, multiply-sub, and their negated versions by Nate Begeman · 20 years ago
  90. 27eeb00 Set shift amount to Extend by Nate Begeman · 20 years ago
  91. 3316252 Implement SetCC, fix ZERO_EXTEND_INREG by Nate Begeman · 20 years ago
  92. ca12a2b Remove fake instruction 'subc' (mnemonic for subfc). More pattern isel updates by Nate Begeman · 20 years ago
  93. 7a823bd Fix a problem where the PPC backend lost track of the fact that it had by Chris Lattner · 20 years ago
  94. be686a8 Factor out common .td file chunks. by Chris Lattner · 20 years ago
  95. a1ab451 Fix encoding of fneg instruction by Chris Lattner · 20 years ago
  96. 3b78e3b Fix encoding of bctrl, and remove some unused instructions by Nate Begeman · 20 years ago
  97. 6f40789 Fix encoding of blr and bctr by Chris Lattner · 20 years ago
  98. 943f452 Fix encodings by Chris Lattner · 20 years ago
  99. 6540c6c LA is really addi. Be consistent with operand ordering to avoid confusing the code emitter by Chris Lattner · 20 years ago
  100. dd99885 Comment out a couple of unused instructions. by Chris Lattner · 20 years ago