1. 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 17 years ago
  2. f1b1c5e implement a trivial readme entry. by Chris Lattner · 17 years ago
  3. 27a6c73 Several changes: by Chris Lattner · 17 years ago
  4. 0f8d9c0 Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack by Bill Wendling · 17 years ago
  5. e0cb36b [ARM] Implement __builtin_thread_pointer. by Lauro Ramos Venancio · 17 years ago
  6. f1ba1ca Move the LowerMEMCPY and LowerMEMCPYCall to a common place. by Rafael Espindola · 17 years ago
  7. e0703c8 Make ARM and X86 LowerMEMCPY identical by moving the isThumb check into getMaxInlineSizeThreshold by Rafael Espindola · 17 years ago
  8. fc05f40 Make ARM an X86 memcpy expansion more similar to each other. by Rafael Espindola · 17 years ago
  9. 4102eb5 Fix memcpy lowering when addresses are 4-byte aligned but size is not multiple of 4. by Evan Cheng · 17 years ago
  10. 7b73a5d split LowerMEMCPY into LowerMEMCPYCall and LowerMEMCPYInline in the ARM backend. by Rafael Espindola · 17 years ago
  11. 65a3323 legalizing the ret operation on f64 shouldn't introduce a new by Chris Lattner · 17 years ago
  12. f96e4de Set ISD::FPOW to Expand. by Dan Gohman · 17 years ago
  13. 525178c Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to by Dan Gohman · 17 years ago
  14. f7331b3 Fold the adjust_trampoline intrinsic into by Duncan Sands · 17 years ago
  15. eaf0894 Enhance APFloat to retain bits of NaNs (fixes oggenc). by Dale Johannesen · 17 years ago
  16. 36397f5 Support for trampolines, except for X86 codegen which is still under discussion. by Duncan Sands · 17 years ago
  17. a99be51 Here is the bulk of the sanitizing. by Gabor Greif · 17 years ago
  18. 0e1d379 Reflects the chanegs made to PredicateOperand. by Evan Cheng · 17 years ago
  19. e2446c6 Silence a warning. by Evan Cheng · 17 years ago
  20. ea859be Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from by Dan Gohman · 17 years ago
  21. 97e604e Be more conservative of duplicating blocks. by Evan Cheng · 17 years ago
  22. 277f074 Allow predicated immediate ARM to ARM calls. by Evan Cheng · 17 years ago
  23. 144fd1f Set ARM ifcvt duplication limit to 3 for now. by Evan Cheng · 17 years ago
  24. e5e7ce4 Silence some compilation warnings. by Evan Cheng · 17 years ago
  25. 9f8cbd1 Set ARM if-conversion block size threshold to 10 instructions for now. by Evan Cheng · 17 years ago
  26. 8dd86c1 More effective breakdown of memcpy into repeated load/store. These are now by Dale Johannesen · 17 years ago
  27. 5d3d44a Fix previous patch. GOTOFF can be used only when the symbol has internal by Lauro Ramos Venancio · 17 years ago
  28. 930d161 Optimize PIC implementation. GOTOFF can be used when the symbol is defined by Lauro Ramos Venancio · 17 years ago
  29. 97c9bb5 On Mac OS X, GV requires an extra load only when relocation-model is non-static. by Evan Cheng · 17 years ago
  30. e8e5495 Debug support for arm-linux. Patch by Raul Herbster. by Lauro Ramos Venancio · 17 years ago
  31. 0b0a9a9 Typo. It's checking if V is multiple of 4, not multiple of 3. :-) by Evan Cheng · 17 years ago
  32. 64f4fa5 ARM TLS: implement "general dynamic", "initial exec" and "local exec" models. by Lauro Ramos Venancio · 17 years ago
  33. b1df8f2 Darwin runtime library does not have these. by Evan Cheng · 17 years ago
  34. 0ae4a33 Implement PIC for arm-linux. by Lauro Ramos Venancio · 17 years ago
  35. 5a3d40d arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes. by Chris Lattner · 17 years ago
  36. e115294 Fix incorrect fall-throughs in addr mode code. This fixes CodeGen/ARM/arm-negative-stride.ll by Chris Lattner · 17 years ago
  37. eb13d1b restore support for negative strides by Chris Lattner · 17 years ago
  38. 37caf8c remove dead target hooks by Chris Lattner · 17 years ago
  39. b445d0c remove some dead target hooks, subsumed by isLegalAddressingMode by Chris Lattner · 17 years ago
  40. 0a7baa2 Typo. by Evan Cheng · 17 years ago
  41. b2c594f Arm supports negative strides as well, add them. This lets us compile: by Chris Lattner · 17 years ago
  42. 6e0784d fix the CodeGen/ARM/2007-03-13-InstrSched.ll regression: allow IV's with scales by Chris Lattner · 17 years ago
  43. c4e3f8e add support for the 'w' inline asm register class. by Chris Lattner · 17 years ago
  44. 9996663 - Divides the comparisons in two types: comparisons that only use N and Z by Lauro Ramos Venancio · 17 years ago
  45. 3074d9d Add i16 address mode. by Evan Cheng · 17 years ago
  46. c9addb7 implement the new addressing mode description hook. by Chris Lattner · 17 years ago
  47. caaf691 Remove isLegalAddressImmediate. by Evan Cheng · 17 years ago
  48. b8a93a4 bugfix: sometimes the spiller puts a load between the "mov lr, pc" and "bx" of a CALL_NOLINK. by Lauro Ramos Venancio · 17 years ago
  49. 4234f57 switch TargetLowering::getConstraintType to take the entire constraint, by Chris Lattner · 17 years ago
  50. fa4bce2 repair x86 performance, dejagnu problems from previous change by Dale Johannesen · 17 years ago
  51. 8e59e16 do not share old induction variables when this would result in invalid by Dale Johannesen · 17 years ago
  52. 64c88d7 bugfix: When the source register of CALL_NOLINK was LR, the following code was emitted: by Lauro Ramos Venancio · 17 years ago
  53. 1719e13 fix indentation by Chris Lattner · 17 years ago
  54. 9f6636f Fix naming inconsistencies. by Evan Cheng · 17 years ago
  55. 368f20f Only ARMv6 has BSWAP. Fix MultiSource/Applications/aha test. by Lauro Ramos Venancio · 17 years ago
  56. 2770747 Added isLegalAddressExpression(). Only allows X +/- C for now. by Evan Cheng · 17 years ago
  57. 961f879 Zero is always a legal AM immediate. by Evan Cheng · 17 years ago
  58. b01fad6 Updated TargetLowering LSR addressing mode hooks for ARM and Thumb. by Evan Cheng · 17 years ago
  59. b582b1b Fix a typo. by Evan Cheng · 17 years ago
  60. d0b82b3 Refactoring of formal parameter flags. Enable properly use of by Anton Korobeynikov · 17 years ago
  61. 1d9bacc Use new SDIselParamAttr enumeration. This removes "magick" constants by Anton Korobeynikov · 17 years ago
  62. 600c383 Fix stack alignment in functions with varargs. by Lauro Ramos Venancio · 17 years ago
  63. 2ad9f17 Simplify lowering and selection of exception ops. by Jim Laskey · 17 years ago
  64. 62819f3 Support to provide exception and selector registers. by Jim Laskey · 17 years ago
  65. 876eaf1 According to ARM EABI, 8-bytes function arguments must be 8-bytes aligned. by Lauro Ramos Venancio · 17 years ago
  66. fc40342 Fix comments. by Evan Cheng · 18 years ago
  67. 9a2ef95 Fix a bug in getARMCMP (which translate CondCode to ARM specific CC) when the RHS is a constant. by Evan Cheng · 18 years ago
  68. b063615 Thumb does not have clz. by Evan Cheng · 18 years ago
  69. 193f850 Specify the right CC for comparison libcalls. by Evan Cheng · 18 years ago
  70. b6ab254 Observe -soft-float. by Evan Cheng · 18 years ago
  71. c60e76d - Fix codegen for pc relative constant (e.g. JT) in thumb mode: by Evan Cheng · 18 years ago
  72. 5cbf985 For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid by Reid Spencer · 18 years ago
  73. bcc5f36 Finish off bug 680, allowing targets to custom lower frame and return by Nate Begeman · 18 years ago
  74. b10308e Propagate changes from my local tree. This patch includes: by Anton Korobeynikov · 18 years ago
  75. 1ee2925 Make LABEL a builtin opcode. by Jim Laskey · 18 years ago
  76. 2576f13 Use bl to call Thumb fuctions directly. by Evan Cheng · 18 years ago
  77. 970a419 isDarwin -> isTargetDarwin by Evan Cheng · 18 years ago
  78. a8e2989 ARM backend contribution from Apple. by Evan Cheng · 18 years ago