1. 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 17 years ago
  2. 6eaeff2 Next PPC long double bits: ppcf128->i32 conversion. by Dale Johannesen · 17 years ago
  3. 64d80e3 Change instruction description to split OperandList into OutOperandList and by Evan Cheng · 17 years ago
  4. eb95d41 Add XLForm_1_ext template, patch by Nicolas Geoffray. by Chris Lattner · 17 years ago
  5. c5d2459 fix another sradi encoding bug. This fixes Olden/health with the ppc64 jit. by Chris Lattner · 18 years ago
  6. c5e241b fix the jit encoding of sradi, simplify the MDForm1 description. by Chris Lattner · 18 years ago
  7. 54e853b Rewrite the branch selector to be correct in the face of large functions. by Chris Lattner · 18 years ago
  8. d527515 add encoding for BCC, after finally wrestling strange ppc/tblgen endianness by Chris Lattner · 18 years ago
  9. 8e28b5c Stop using isTwoAddress, switching to operand constraints instead. by Chris Lattner · 18 years ago
  10. 94e509c implement preinc support for r+i loads on ppc64 by Chris Lattner · 18 years ago
  11. 6a944e2 dform 8/9 are identical to dform 1 by Chris Lattner · 18 years ago
  12. 0921365 fix encoding of BLR by Chris Lattner · 18 years ago
  13. 6fc4007 encode BLR predicate info for the JIT by Chris Lattner · 18 years ago
  14. a606b70 Another fix in the rotate encodings, needed when the first two operands are not by Chris Lattner · 18 years ago
  15. b2c0650 Fix encoding of rotates, such as rldicl by Chris Lattner · 18 years ago
  16. e4172be Add a pattern for i64 sra. Print 8-byte units with a space between the .quad by Chris Lattner · 18 years ago
  17. b410dc9 Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file by Chris Lattner · 18 years ago
  18. 96dc5e5 remove unused flag by Chris Lattner · 18 years ago
  19. 001db45 Add PowerPC intrinsics to support dcbz[l] by Chris Lattner · 18 years ago
  20. d8242b4 Add all of the data stream intrinsics and instructions. woo by Chris Lattner · 18 years ago
  21. 4d9100d Add m[tf]vscr instructions. by Chris Lattner · 18 years ago
  22. fb143ce Fix the JIT encoding of VSEL by Chris Lattner · 18 years ago
  23. eeaf72a Fix the JIT encoding of VSPLTI* by Chris Lattner · 18 years ago
  24. b8a45c2 Add all of the altivec comparison instructions. Add patterns for the by Chris Lattner · 18 years ago
  25. e7d959c implement the vsldoi intrinsic. by Chris Lattner · 18 years ago
  26. eb8b09f Fix the JIT encoding of the VAForm_1 instructions, including vmaddfp by Chris Lattner · 18 years ago
  27. fd97734 Mark instructions that are cracked by the PPC970 decoder as such. by Chris Lattner · 18 years ago
  28. 88d211f Several big changes: by Chris Lattner · 18 years ago
  29. cedc6f4 PHI and INLINEASM are now built-in instructions provided by Target.td by Chris Lattner · 19 years ago
  30. 9e4dd9d Pattern-match return. Includes gross hack! by Nate Begeman · 19 years ago
  31. 3fb6877 Add support for fmul node of type v4f32. by Nate Begeman · 19 years ago
  32. 0976122 Add support patterns to many load and store instructions which will by Nate Begeman · 19 years ago
  33. 1e48478 Define BR in the .td file now that Evan made tblgen smarter. by Chris Lattner · 19 years ago
  34. 7ac8e6b Represent the encoding of the SPR instructions as they actually are, so by Nate Begeman · 19 years ago
  35. 9b14f66 Add the remainder of the AltiVec 4 x float instructions. Further by Nate Begeman · 19 years ago
  36. 01595c5 Small tweaks noticed while on the plane. by Nate Begeman · 19 years ago
  37. e4f17a5 Some first bits of AltiVec stuff: Instruction Formats, Encodings, and by Nate Begeman · 19 years ago
  38. 3075a4e Allow pseudos to have patterns, no functionality change by Chris Lattner · 19 years ago
  39. 5384214 Added InstrSchedClass to each of the PowerPC Instructions. by Jim Laskey · 19 years ago
  40. 2d5aff7 Write patterns for the various shl and srl patterns that don't involve by Nate Begeman · 19 years ago
  41. 617742b Nuke PowerPCInstrFormats.h, its contents are dead. Remove the definitions by Chris Lattner · 19 years ago
  42. 67ab118 Add a bunch of patterns for F64 FP ops, add some more integer ops by Chris Lattner · 19 years ago
  43. bfde080 add patterns for x?oris? by Chris Lattner · 19 years ago
  44. 3e63ead add patterns to the addi/addis/mulli etc instructions. Define predicates by Chris Lattner · 19 years ago
  45. d1cdc70 Add patterns for some new instructions, allowing the use of the ineg fragment. by Chris Lattner · 19 years ago
  46. 6159fb2 Add AND/OR/XOR by Chris Lattner · 19 years ago
  47. 218a15d Add some initial patterns to simple binary instructions, though they by Chris Lattner · 19 years ago
  48. 6718f11 Fix JIT encoding of conditional branches by Nate Begeman · 19 years ago
  49. 394cd13 Fix JIT encoding of ppc mfocrf instruction; the operands were reversed by Nate Begeman · 19 years ago
  50. 14522e3 switch over the rest of the formats that use RC to use isDOT by Chris Lattner · 19 years ago
  51. 883059f Convert the XForm instrs and XSForm instruction over to use isDOT by Chris Lattner · 19 years ago
  52. 97a2d42 Now that the ppc64 and vmx operands of I are always 0, forward substitute by Chris Lattner · 19 years ago
  53. a611ab7 convert over bform and iform instructions by Chris Lattner · 19 years ago
  54. 57226fb Convert over DForm and DSForm instructions by Chris Lattner · 19 years ago
  55. e19d0b1 Convert XLForm and XForm instructions over to use PPC64 when appropriate. by Chris Lattner · 19 years ago
  56. 5035cef Convert XO XS and XFX forms to use isPPC64 by Chris Lattner · 19 years ago
  57. 0bdc6f1 Turn PPC64 and VMX into classes that can be added to instructions instead of by Chris Lattner · 19 years ago
  58. 16ac709 Change codegen for setcc to read the bit directly out of the condition by Nate Begeman · 19 years ago
  59. ef7288c Add the necessary support to codegen condition register logical ops with by Nate Begeman · 19 years ago
  60. 7af0248 Initial support for allocation condition registers by Nate Begeman · 19 years ago
  61. 6b4ea2c Revert the previous patch, which I didn't mean to check in. by Chris Lattner · 19 years ago
  62. 26d4fdb Fix a minor bug (ORo didn't mark that it set CR0). by Chris Lattner · 19 years ago
  63. 5cbf3bc Fix encoding of fsel, fixing olden/power, McCat/bisort and several others. by Chris Lattner · 20 years ago
  64. cd61ec8 Fix encoding of swari, fixing several programs, including Olden/mst by Chris Lattner · 20 years ago
  65. 69efbdd Fix a few more tests by encoding the extsb and other XForm11 instructions by Chris Lattner · 20 years ago
  66. 2f5091a Fix the encoding of ORi and other DForm4 instructions. This brings us to by Chris Lattner · 20 years ago
  67. 310a752 Branch instructions explicitly represent CRx in them. bEcause of this, encode by Chris Lattner · 20 years ago
  68. 5afa9af Fix the encoding of OR, AND and many other instructions by Chris Lattner · 20 years ago
  69. d162032 Remove argtype and argcount magic, which was used by the old asmprinter. by Chris Lattner · 20 years ago
  70. 89d60de Fix encoding of rlwinm? by Chris Lattner · 20 years ago
  71. bd7780b DForm_1, particularly used by store instructions, needs the immediate operand to by Misha Brukman · 20 years ago
  72. a671f3b There is only one field in an instruction, and that is `Inst', the final view of by Misha Brukman · 20 years ago
  73. ed42853 All PPC instructions are now auto-printed by Nate Begeman · 20 years ago
  74. b7a8f2c Convert remaining X-Form and Pseudo instructions over to asm writer by Nate Begeman · 20 years ago
  75. cc8bd9c convert M and MD form instructions to generated asm writer by Nate Begeman · 20 years ago
  76. 07aada8 Move yet more instructions over to being printed by the generated asm writer by Nate Begeman · 20 years ago
  77. 6b3dc55 Convert A-Form instructions to auto-generated asm writer by Nate Begeman · 20 years ago
  78. c330612 Move XForm instructions over to the auto-generated asm writer by Nate Begeman · 20 years ago
  79. 0ea3171 Convert all of the DForm_6* operations, which makes all of the Zimm16 users by Chris Lattner · 20 years ago
  80. 97b2a2e Convert the DForm_4 over to the asmprintergen by Chris Lattner · 20 years ago
  81. 244e64e Add some more 64 bit instructions we need for the PowerPC-64 ISel to the tablegen files by Nate Begeman · 20 years ago
  82. f1f6cef Add support for 64-bit CMPDI, CMPLDI, and CMPLD opcodes by Misha Brukman · 20 years ago
  83. 96b6110 Add doubleword load/store (64-bit only). by Misha Brukman · 20 years ago
  84. 5b57081 Renamed PPC32 (namespace for regs, opcodes) to PPC to include 64-bit targets by Misha Brukman · 20 years ago
  85. 42efb87 DForm 5/6 extended mneumonics take 3 arguments. by Misha Brukman · 20 years ago
  86. a91f536 Fix DForm_4: format is `op r, r, i' by Misha Brukman · 20 years ago
  87. 8124020 Remove ClassPrefix variable as it's no longer used. by Misha Brukman · 20 years ago
  88. 929072e Define a ClassPrefix for PowerPC. by Misha Brukman · 20 years ago
  89. 4ad7d1b Use instruction formats as defined in the PowerPC ISA manual by Misha Brukman · 20 years ago
  90. 7338ae5 Remove unused instruction classes by Misha Brukman · 20 years ago
  91. c681a4e Replace patterns 0, 4, and 5 with simpler heirarchical definitions that use the by Misha Brukman · 20 years ago
  92. 28791dd Separate instruction formats from instruction definitions. by Misha Brukman · 20 years ago