- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 17 years ago
- 718cb66 Add lengthof and endof templates that hide a lot of sizeof computations. by Owen Anderson · 17 years ago
- 13e8b51 Handle blocks with 2 unconditional branches in AnalyzeBranch. by Dale Johannesen · 17 years ago
- bfd2ec4 Add a utility routine to check for unpredicated terminator instruction. by Evan Cheng · 17 years ago
- 126f17a BlockHasNoFallThrough() now returns true if block ends with a return instruction. by Evan Cheng · 17 years ago
- b5cdaa2 RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. by Evan Cheng · 17 years ago
- 1e341729 Relex assertions to account for additional implicit def / use operands. by Evan Cheng · 17 years ago
- f5da133 What should be the last unnecessary <iostream>s in the library. by Bill Wendling · 18 years ago
- c0f64ff Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead by Evan Cheng · 18 years ago
- 18258c6 convert PPC::BCC to use the 'pred' operand instead of separate predicate by Chris Lattner · 18 years ago
- 289c2d5 rename PPC::COND_BRANCH to PPC::BCC by Chris Lattner · 18 years ago
- df4ed63 start using PPC predicates more consistently. by Chris Lattner · 18 years ago
- 6ce7dc2 Properly transfer kill / dead info. by Evan Cheng · 18 years ago
- 7ce4578 Matches MachineInstr changes. by Evan Cheng · 18 years ago
- ef13982 implement the BlockHasNoFallThrough hook by Chris Lattner · 18 years ago
- 7c4fe25 Implement support for branch reversal, fix a bug in branch analysis. by Chris Lattner · 18 years ago
- 879d09c Simplify code, no functionality change by Chris Lattner · 18 years ago
- 5410806 implement support for inserting a cond branch by Chris Lattner · 18 years ago
- 2dc7723 add support for inserting an uncond branch by Chris Lattner · 18 years ago
- c50e2bc implement branch inspection/modification methods. by Chris Lattner · 18 years ago
- 804e067 In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones. by Chris Lattner · 18 years ago
- b410dc9 Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file by Chris Lattner · 18 years ago
- b1d26f6 Implement the getPointerRegClass method, which is required for the ptr_rc by Chris Lattner · 18 years ago
- e53f4a0 Move some methods out of MachineInstr into MachineOperand by Chris Lattner · 18 years ago
- 9c09c9e teach the ppc backend how to spill/reload vector regs by Chris Lattner · 19 years ago
- 335fd3c Add support for copying registers. still needed: spilling and reloading them by Chris Lattner · 19 years ago
- bbf1c72 implement TII::insertNoop by Chris Lattner · 19 years ago
- 3b478b3 add 64b gpr store to the possible list of isStoreToStackSlot opcodes. by Nate Begeman · 19 years ago
- 6524287 implement isStoreToStackSlot for PPC by Chris Lattner · 19 years ago
- 4083960 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) by Chris Lattner · 19 years ago
- 14c09b8 teach ppc backend these are copies by Chris Lattner · 19 years ago
- 1d9d742 First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is by Nate Begeman · 19 years ago
- 21e463b More PPC32 -> PPC changes, as well as merging some classes that were by Nate Begeman · 19 years ago
- 16e71f2 Rename PPC32*.h to PPC*.h by Chris Lattner · 19 years ago
- 2668959 Rename PowerPC*.h to PPC*.h by Chris Lattner · 19 years ago
- 4c7b43b Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td by Chris Lattner · 19 years ago
- eb5d47d Fix a CQ regression from my patch to split F32/F64 into seperate register by Chris Lattner · 19 years ago
- 919c032 Modify the ppc backend to use two register classes for FP: F8RC and F4RC. by Chris Lattner · 19 years ago
- 043870d Teach the code generator that rlwimi is commutable if the rotate amount by Chris Lattner · 19 years ago
- b5f662f Remove trailing whitespace by Misha Brukman · 19 years ago
- 7af0248 Initial support for allocation condition registers by Nate Begeman · 20 years ago
- cb90de3 Add ori reg, reg, 0 as a move instruction. This can be generated from by Nate Begeman · 20 years ago
- f2ccb77 PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC* by Misha Brukman · 20 years ago