- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 17 years ago
- ee91254 Mark the "isRemat" instruction as never having side effects. by Bill Wendling · 17 years ago
- 6e141fd Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled. by Evan Cheng · 17 years ago
- 0f940c9 Initial commit of the machine code LICM pass. It successfully hoists this: by Bill Wendling · 17 years ago
- c69107c Unifacalize the CALLSEQ{START,END} stuff. by Bill Wendling · 17 years ago
- 0f8d9c0 Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack by Bill Wendling · 17 years ago
- 20ab290 Add a flag for indirect branch instructions. by Owen Anderson · 17 years ago
- 152b7e1 Temporary solution: added a different set of BCTRL_Macho / BCTRL_ELF with right callee-saved defs set for ppc64. by Evan Cheng · 17 years ago
- 6eaeff2 Next PPC long double bits: ppcf128->i32 conversion. by Dale Johannesen · 17 years ago
- 071a279 Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead. by Evan Cheng · 17 years ago
- caf778a Some out operands were incorrectly specified as input operands. by Evan Cheng · 17 years ago
- ffbacca No more noResults. by Evan Cheng · 17 years ago
- d5f181a Oops. These stores actually produce results. by Evan Cheng · 17 years ago
- 64d80e3 Change instruction description to split OperandList into OutOperandList and by Evan Cheng · 17 years ago
- 06aae67 Do away with ImmutablePredicateOperand. by Evan Cheng · 17 years ago
- 7e36966 PPC conditional branch predicate does not change after isel. by Evan Cheng · 17 years ago
- f88b3a5 PredicateOperand can be used as a normal operand for isel. by Evan Cheng · 17 years ago
- ef3c030 The ELF ABI specifies F1-F8 registers as argument registers for double, not by Nicolas Geoffray · 17 years ago
- 63f8fb1 Differentiate between the MachO and the ELF ABI the CALL instruction. by Nicolas Geoffray · 17 years ago
- caddd44 always lower to RETFLAG, never leave it as just ret. by Chris Lattner · 17 years ago
- 1fa3d9e one important bugfix: PPC32 didn't have both elf and macho support for by Chris Lattner · 17 years ago
- 9f0bc65 implement support for the linux/ppc function call ABI. Patch by by Chris Lattner · 17 years ago
- 1ee2925 Make LABEL a builtin opcode. by Jim Laskey · 18 years ago
- 54e853b Rewrite the branch selector to be correct in the face of large functions. by Chris Lattner · 18 years ago
- d527515 add encoding for BCC, after finally wrestling strange ppc/tblgen endianness by Chris Lattner · 18 years ago
- 18258c6 convert PPC::BCC to use the 'pred' operand instead of separate predicate by Chris Lattner · 18 years ago
- 289c2d5 rename PPC::COND_BRANCH to PPC::BCC by Chris Lattner · 18 years ago
- df4ed63 start using PPC predicates more consistently. by Chris Lattner · 18 years ago
- 2f616bf by Jim Laskey · 18 years ago
- 0403862 fix broken encoding by Chris Lattner · 18 years ago
- 74531e4 add patterns for ppc32 preinc stores. ppc64 next. by Chris Lattner · 18 years ago
- ef20fef switch these back to the 'bad old way' by Chris Lattner · 18 years ago
- 8e28b5c Stop using isTwoAddress, switching to operand constraints instead. by Chris Lattner · 18 years ago
- 0851b4f fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri by Chris Lattner · 18 years ago
- f8e07f4 Switch loads over to use memri as the operand instead of a reg/imm operand by Chris Lattner · 18 years ago
- 26e552b group load and store instructions together. No functionality change. by Chris Lattner · 18 years ago
- 6a5339b Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls by Chris Lattner · 18 years ago
- d181c01 Mark operands as symbol lo instead of imm32 so that they print lo(x) around by Chris Lattner · 18 years ago
- 6a944e2 dform 8/9 are identical to dform 1 by Chris Lattner · 18 years ago
- 4eab714 add an initial cut at preinc loads for ppc32. This is broken for ppc64 by Chris Lattner · 18 years ago
- 302bf9c correct the (currently unused) pattern for lwzu. by Chris Lattner · 18 years ago
- 6fc4007 encode BLR predicate info for the JIT by Chris Lattner · 18 years ago
- af53a87 Go through all kinds of trouble to mark 'blr' as having a predicate operand by Chris Lattner · 18 years ago
- 0638b26 Describe PPC predicates, which are a pair of CR# and condition. by Chris Lattner · 18 years ago
- 7049540 remove dead vars by Chris Lattner · 18 years ago
- e90c537 Add intrinsics for the rest of the DCB* instructions. by Chris Lattner · 18 years ago
- 8b2794a Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. by Evan Cheng · 18 years ago
- 594f4c6 set isBarrier correctly by Chris Lattner · 18 years ago
- 1e5e974 mark adjcallstack up/down as clobbering and using the SP by Chris Lattner · 18 years ago
- af9db75 Add properties to ComplexPattern. by Evan Cheng · 18 years ago
- 466685d Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. by Evan Cheng · 18 years ago
- 5468966 Use abstract private/comment directives, to increase portability to ppc/linux by Chris Lattner · 18 years ago
- f42f133 Fold AND and ROTL more often by Nate Begeman · 18 years ago
- bb7b844 CALLSEQ_* produces chain even if that's not needed. by Evan Cheng · 18 years ago
- 2a78550 bswapped load/store instructions are only availble in indexed addressing form. by Chris Lattner · 18 years ago
- 303c695 Make the implicit def instructions look like other instrs. by Chris Lattner · 18 years ago
- d998938 Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps by Chris Lattner · 18 years ago
- 2e6b77d Add 64-bit MTCTR so that indirect calls work. by Chris Lattner · 18 years ago
- 563ecfb Implement 64-bit undef, sub, shl/shr, srem/urem by Chris Lattner · 18 years ago
- c08f902 Implement a bunch of 64-bit cleanliness work. With this, treeadd builds (but by Chris Lattner · 18 years ago
- 924c576 Remove two more definitions by Chris Lattner · 18 years ago
- 7b4e478 remove two unused instructions. by Chris Lattner · 18 years ago
- 7f7b346e Make these predicates correct in 64-bit mode too. by Chris Lattner · 18 years ago
- b410dc9 Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file by Chris Lattner · 18 years ago
- 96dc5e5 remove unused flag by Chris Lattner · 18 years ago
- 4b25b40 remove some unused patterns by Chris Lattner · 18 years ago
- 0ea70b2 Add some 64-bit logical ops. by Chris Lattner · 18 years ago
- dd58343 64-bit bugfix: 0xFFFF0000 cannot be formed with a single lis. by Chris Lattner · 18 years ago
- 4e85e64 Remove some now-unneeded casts from instruction patterns. With the casts by Chris Lattner · 18 years ago
- 66d7ebb In 64-bit mode, addr mode operands use G8RC instead of GPRC. by Chris Lattner · 18 years ago
- 059ca0f fix some assumptions that pointers can only be 32-bits. With this, we can by Chris Lattner · 18 years ago
- 956f43c Split 64-bit instructions out into a separate .td file by Chris Lattner · 18 years ago
- 4a45abf Fix a problem exposed by the local allocator. CALL instructions are not marked by Chris Lattner · 18 years ago
- 001db45 Add PowerPC intrinsics to support dcbz[l] by Chris Lattner · 18 years ago
- c703a8f Make PPC call lowering more aggressive, making the isel matching code simple by Chris Lattner · 18 years ago
- 9a2a497 Switch PPC over to a call-selection model where the lowering code creates by Chris Lattner · 18 years ago
- 37efe67 JumpTable support! What this represents is working asm and jit support for by Nate Begeman · 18 years ago
- 80f362a These are correctly encoded by the JIT. I checked :) by Chris Lattner · 18 years ago
- 90564f2 Implement an important entry from README_ALTIVEC: by Chris Lattner · 18 years ago
- 710ff32 Add VRRC select support by Chris Lattner · 18 years ago
- a17b155 Lower vector compares to VCMP nodes, just like we lower vector comparison by Chris Lattner · 18 years ago
- 7f20b13 Use normal lvx for scalar_to_vector instead of lve*x. They do the exact by Chris Lattner · 18 years ago
- 6d92cad Codegen vector predicate compares. by Chris Lattner · 18 years ago
- b22a04d Move all Altivec stuff out into a new PPCInstrAltivec.td file. by Chris Lattner · 18 years ago
- 8d052bc Add some basic patterns for other datatypes by Chris Lattner · 18 years ago
- 5a20254 Add support for __builtin_altivec_vnmsubfp /vmaddfp by Chris Lattner · 18 years ago
- 9c61dcf Codegen things like: by Chris Lattner · 18 years ago
- 8edd11f Fix a bad JIT encoding of VPERM. Why is VPERM D,A,B,C but vfmadd is D,A,C,B ?? by Chris Lattner · 18 years ago
- 64b3a08 add support for using vxor to build zero vectors. This implements by Chris Lattner · 18 years ago
- 9d5da1d Gabor points out that we can't spell. :) by Chris Lattner · 18 years ago
- dc6af72 Add PPC vector bit-convert support by Chris Lattner · 18 years ago
- ecfe55e When possible, custom lower 32-bit SINT_TO_FP to this: by Chris Lattner · 18 years ago
- eb8b09f Fix the JIT encoding of the VAForm_1 instructions, including vmaddfp by Chris Lattner · 18 years ago
- 8593f98 When codegen'ing vector MUL using VFMADD, *add* the 0, don't *mul* the 0. by Chris Lattner · 18 years ago
- bd83afd Fix a couple of bugs in permute/splat generate, thanks to Nate for actually by Chris Lattner · 18 years ago
- 32f57d9 Fix the pattern for VADDUWM, add i32 splat by Chris Lattner · 18 years ago
- e63d746 Use tblgen'd VECTOR_SHUFFLE selection code. by Evan Cheng · 18 years ago
- dd4d2d0 Add support for generating vspltw, instead of a vperm instruction with a by Chris Lattner · 18 years ago
- 3c0f9cc Check in some intermediate code that adds a skeleton for matching vsplt* by Chris Lattner · 18 years ago
- 08e25de fix typo by Chris Lattner · 18 years ago