- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 17 years ago
- d964285 Fix a significant code quality regression I introduced on PPC64 quite by Chris Lattner · 17 years ago
- 3fc027d implement __builtin_return_addr(0) on ppc. by Chris Lattner · 17 years ago
- 73944fb refactor some code to avoid overloading the name 'usesLR' in by Chris Lattner · 17 years ago
- 5a75961 Fix a compilation warning. by Evan Cheng · 17 years ago
- 8c24e74 Added canFoldMemoryOperand for PPC. by Evan Cheng · 17 years ago
- d64b5c8 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether by Evan Cheng · 17 years ago
- aee4af6 Remove redundant foldMemoryOperand variants and other code clean up. by Evan Cheng · 17 years ago
- 789db09 Fix a crash on invalid code due to memcpy lowering. by Chris Lattner · 17 years ago
- b97aec6 Add parameter to getDwarfRegNum to permit targets by Dale Johannesen · 17 years ago
- 3809fbe Completely forgot, that we have some debug information emission on PPC. This should fix by Anton Korobeynikov · 17 years ago
- f191c80 Use TableGen to emit information for dwarf register numbers. by Anton Korobeynikov · 17 years ago
- f0a0cdd - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding. by Evan Cheng · 17 years ago
- 58184e6 Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface. by Evan Cheng · 17 years ago
- f602a25 Fix a bug handling frame references in ppc inline asm when the frame offset by Chris Lattner · 17 years ago
- 66f0f64 - Added a few target hooks to generate load / store instructions from / to any by Evan Cheng · 17 years ago
- 9efce63 Allow copyRegToReg to emit cross register classes copies. by Evan Cheng · 17 years ago
- fdd9f00 Fix comments. by Evan Cheng · 17 years ago
- 82d2514 Add missing index versions of instructions to the map. by Bill Wendling · 17 years ago
- 64d80e3 Change instruction description to split OperandList into OutOperandList and by Evan Cheng · 17 years ago
- 2365f51 Long live the exception handling! by Anton Korobeynikov · 17 years ago
- 97de913 eliminateFrameIndex() change. by Evan Cheng · 17 years ago
- 6c087e5 Match MachineFunction::UsedPhysRegs changes. by Evan Cheng · 17 years ago
- ec58d9f The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules by Nicolas Geoffray · 17 years ago
- cfcd8da Addition to the previous commit for getCalleeSavedRegClasses: by Nicolas Geoffray · 17 years ago
- ef3c030 The ELF ABI specifies F1-F8 registers as argument registers for double, not by Nicolas Geoffray · 17 years ago
- 82d4264 Protect R31's frame offset from being used by callee-saved registers, when R31 by Nicolas Geoffray · 17 years ago
- bf2c8b3 Added MRegisterInfo hook to re-materialize an instruction. by Evan Cheng · 17 years ago
- 28b3c45 Minor interface change. by Evan Cheng · 17 years ago
- 5e6df46 PEI now passes a RegScavenger ptr to eliminateFrameIndex. by Evan Cheng · 17 years ago
- d313a9b Duplicate use of LR, take 2. by Jim Laskey · 17 years ago
- 3d3d627 Backing out Jim's LR spill changes. This was causing llvm-gcc bootstrapping by Evan Cheng · 17 years ago
- 9f0bc65 implement support for the linux/ppc function call ABI. Patch by by Chris Lattner · 17 years ago
- 2a27a75 Don't spill LR as a callee saved register. by Jim Laskey · 17 years ago
- 0fa1b6d By default, spills kills the register being stored. by Evan Cheng · 17 years ago
- 62819f3 Support to provide exception and selector registers. by Jim Laskey · 17 years ago
- b371f45 Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. by Evan Cheng · 17 years ago
- a284cbf For PR1207: by Reid Spencer · 17 years ago
- eceada6 Added getReservedRegs(). by Evan Cheng · 17 years ago
- b82313f Support for non-landing pad exception handling. by Jim Laskey · 18 years ago
- 9aa2895 Fix CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll by Chris Lattner · 18 years ago
- e078d1a Only gather frame info if debug or eh. by Jim Laskey · 18 years ago
- 072200c Landing pad-less eh for PPC. by Jim Laskey · 18 years ago
- 44c3b9f Change the MachineDebugInfo to MachineModuleInfo to better reflect usage by Jim Laskey · 18 years ago
- 1ee2925 Make LABEL a builtin opcode. by Jim Laskey · 18 years ago
- fab0439 Fix comment. by Evan Cheng · 18 years ago
- 99403b6 - Tell PEI that PPC will handle stack frame rounding itself. by Evan Cheng · 18 years ago
- 5e73d5b Repair debug frames as a prelude to eh_frames. Switched to using MachineMoves by Jim Laskey · 18 years ago
- dc77540 hasFP() is now a virtual method of MRegisterInfo. by Evan Cheng · 18 years ago
- c2b861d Fix naming inconsistency. by Evan Cheng · 18 years ago
- f5da133 What should be the last unnecessary <iostream>s in the library. by Bill Wendling · 18 years ago
- c88fa74 fix CodeGen/PowerPC/2006-12-07-LargeAlloca.ll on ppc64 by Chris Lattner · 18 years ago
- 51fe9d9 Make it easier for gdb to find the return address. by Jim Laskey · 18 years ago
- 12a4478 MachineInstr::setOpcode -> MachineInstr::setInstrDescriptor by Evan Cheng · 18 years ago
- c0f64ff Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead by Evan Cheng · 18 years ago
- bdc571b r13 is the thread pointer on darwin/ppc64, don't allocate it. by Chris Lattner · 18 years ago
- d6fa8c1 Assert unhandled case. by Jim Laskey · 18 years ago
- 2ff5cdb 1. Ignore the -disable-fp-elim when the routine is a leaf. by Jim Laskey · 18 years ago
- 2f616bf by Jim Laskey · 18 years ago
- 5e797a5b Fix ppc64 epilog bug. by Chris Lattner · 18 years ago
- 6ce7dc2 Properly transfer kill / dead info. by Evan Cheng · 18 years ago
- 5e14b82 Fix the PPC regressions last night by Chris Lattner · 18 years ago
- 6a5339b Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls by Chris Lattner · 18 years ago
- 7ce4578 Matches MachineInstr changes. by Evan Cheng · 18 years ago
- dfc5588 Make sure stack link is set in 64-bit. by Jim Laskey · 18 years ago
- a94a203 implement proper PPC64 prolog/epilog codegen. by Chris Lattner · 18 years ago
- 4bfd1e9 Running with frame pointers prevented debugging, external probes and by Jim Laskey · 18 years ago
- 3ed469c For PR786: by Reid Spencer · 18 years ago
- 09e4606 Completely eliminate def&use operands. Now a register operand is EITHER a by Chris Lattner · 18 years ago
- ce50a16 Handle callee saved registers in dwarf frame info (lead up to exception by Jim Laskey · 18 years ago
- 4c2c903 Fix some comments. by Jim Laskey · 18 years ago
- be6a039 The PPC64 JIT needs register numbers to encode instructions. by Chris Lattner · 18 years ago
- 804e067 In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones. by Chris Lattner · 18 years ago
- 7ffa9ab Fix rewriting frame offsets with ixaddr instructions, which implicitly shift by Chris Lattner · 18 years ago
- b410dc9 Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file by Chris Lattner · 18 years ago
- e67304f Gaar! Don't use r11 for CR save/restore, use R0. R11 can be register by Chris Lattner · 18 years ago
- b47e089 Fix spilling and reloading of CR regs to reload the right values. This fixes by Chris Lattner · 18 years ago
- 0f3ac8d getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. by Evan Cheng · 18 years ago
- 3e6a350 Fix the PowerPC JIT-only failure on UnitTests/Vector/sumarray-dbl, which is by Chris Lattner · 18 years ago
- e53f4a0 Move some methods out of MachineInstr into MachineOperand by Chris Lattner · 18 years ago
- 63b3d71 There shalt be only one "immediate" operand type! by Chris Lattner · 18 years ago
- e45aa73 Revert Nate's CR patch from last night, which caused many regressions (e.g. fhourstones). by Chris Lattner · 18 years ago
- 426cd7c Since we don't handle callee-save CRs right yet, don't allocate them. Also by Nate Begeman · 18 years ago
- f9568d8 Don't diddle VRSAVE if no registers need to be added/removed from it. This by Chris Lattner · 18 years ago
- 402504b Vectors that are known live-in and live-out are clearly already marked in by Chris Lattner · 18 years ago
- 369503f Move some knowledge about registers out of the code emitter into the register info. by Chris Lattner · 18 years ago
- f7d2372 Use a small table instead of macros to do this conversion. by Chris Lattner · 18 years ago
- 2186298 Fix SingleSource/UnitTests/Vector/sumarray-dbl by Nate Begeman · 18 years ago
- 030514c Fix PR727, correctly handling large stack aligments on ppc by Nate Begeman · 18 years ago
- 52fa244 Suppress debug label when not debug. by Jim Laskey · 18 years ago
- 4188699 Foundation for call frame information. by Jim Laskey · 18 years ago
- 4f91a4c Force use of a frame-pointer if there is anything on the stack that is aligned by Chris Lattner · 18 years ago
- a997918 Expose base register for DwarfWriter. Refactor code accordingly. by Jim Laskey · 18 years ago
- 414e682 Translate llvm target registers to dwarf register numbers properly. by Jim Laskey · 18 years ago
- f1d78e8 Add support to locate local variables in frames (early version.) by Jim Laskey · 18 years ago
- ecfe55e When possible, custom lower 32-bit SINT_TO_FP to this: by Chris Lattner · 18 years ago
- e261c47 remove dead variable by Chris Lattner · 18 years ago
- 9c09c9e teach the ppc backend how to spill/reload vector regs by Chris Lattner · 18 years ago
- 8aa777d in functions that use a lot of callee saved regs, this can be more than by Chris Lattner · 18 years ago
- 335fd3c Add support for copying registers. still needed: spilling and reloading them by Chris Lattner · 18 years ago