- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 17 years ago
- 0f8d9c0 Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack by Bill Wendling · 17 years ago
- f96e4de Set ISD::FPOW to Expand. by Dan Gohman · 17 years ago
- 85d0aaa Fix CodeGen/Generic/BasicInstrs.llx on sparc by marking divrem by Chris Lattner · 17 years ago
- f7331b3 Fold the adjust_trampoline intrinsic into by Duncan Sands · 17 years ago
- 36397f5 Support for trampolines, except for X86 codegen which is still under discussion. by Duncan Sands · 17 years ago
- 8dc4b59 Fix CodeGen/Generic/print-arith-fp.ll on sparc (PR1551) by Chris Lattner · 17 years ago
- 75ce010 Assert when TLS is not implemented. by Lauro Ramos Venancio · 17 years ago
- ea859be Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from by Dan Gohman · 17 years ago
- d0b82b3 Refactoring of formal parameter flags. Enable properly use of by Anton Korobeynikov · 17 years ago
- 2ad9f17 Simplify lowering and selection of exception ops. by Jim Laskey · 17 years ago
- 62819f3 Support to provide exception and selector registers. by Jim Laskey · 17 years ago
- bcc5f36 Finish off bug 680, allowing targets to custom lower frame and return by Nate Begeman · 18 years ago
- 1ee2925 Make LABEL a builtin opcode. by Jim Laskey · 18 years ago
- 4785781 For PR950: by Reid Spencer · 18 years ago
- f5da133 What should be the last unnecessary <iostream>s in the library. by Bill Wendling · 18 years ago
- c0f64ff Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead by Evan Cheng · 18 years ago
- 0d53826 Match tblegen changes. by Evan Cheng · 18 years ago
- c35497f All targets expand BR_JT for now. by Evan Cheng · 18 years ago
- 8b2794a Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. by Evan Cheng · 18 years ago
- 466685d Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. by Evan Cheng · 18 years ago
- 786225a Make use of getStore(). by Evan Cheng · 18 years ago
- c548428 Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an by Evan Cheng · 18 years ago
- c356a57 Reflects MachineConstantPoolEntry changes. by Evan Cheng · 18 years ago
- 95514ba SelectNodeTo now returns a SDNode*. by Evan Cheng · 18 years ago
- 9ade218 Select() no longer require Result operand by reference. by Evan Cheng · 18 years ago
- 6da2f32 Match tblgen changes. by Evan Cheng · 18 years ago
- 23329f5 SelectNodeTo() may return a SDOperand that is different from the input. by Evan Cheng · 18 years ago
- 64a752f Match tablegen changes. by Evan Cheng · 18 years ago
- bd564bf Start eliminating temporary vectors used to create DAG nodes. Instead, pass by Chris Lattner · 18 years ago
- 2ef88a0 Match tablegen isel changes. by Evan Cheng · 18 years ago
- 2641cad Remove InFlightSet hack. No longer needed. by Evan Cheng · 18 years ago
- a7dc4a5 Type of extract_element index operand should be iPTR. by Evan Cheng · 18 years ago
- 6848be1 Change RET node to include signness information of the return values. i.e. by Evan Cheng · 18 years ago
- 8b5fbc5 Add support for the missing FP condition codes by Chris Lattner · 18 years ago
- 6a3d5a6 Assert if InflightSet is not cleared after instruction selecting a BB. by Evan Cheng · 18 years ago
- afe358e Clear HandleMap and ReplaceMap after instruction selection. Or it may cause by Evan Cheng · 18 years ago
- d74ea2b Patches to make the LLVM sources more -pedantic clean. Patch provided by Chris Lattner · 18 years ago
- 27aaa39 Remove dead variable. by Chris Lattner · 18 years ago
- 37efe67 JumpTable support! What this represents is working asm and jit support for by Nate Begeman · 18 years ago
- f15485a SelectionDAGISel can now natively handle Switch instructions, in the same by Nate Begeman · 18 years ago
- 420736d #include Intrinsics.h into all dag isels by Chris Lattner · 18 years ago
- 81e8097 Remove BRTWOWAY* by Nate Begeman · 18 years ago
- 9601a86 Copysign needs to be expanded everywhere. Note that Alpha and IA64 should by Chris Lattner · 18 years ago
- 551bf3f kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC by Nate Begeman · 18 years ago
- 368e18d Rework the SelectionDAG-based implementations of SimplifyDemandedBits by Nate Begeman · 18 years ago
- 6fa1f57 Fix SingleSource/Regression/C/2004-08-12-InlinerAndAllocas.c on Sparc. by Chris Lattner · 18 years ago
- 94dd292 Switch targets over to using SelectionDAG::getCALLSEQ_START to create by Chris Lattner · 19 years ago
- ad7a3e6 Use the auto-generated call matcher. Remove a broken impl of the frameaddr/returnaddr by Chris Lattner · 19 years ago
- 7e9b26f Match getTargetNode() changes (now return SDNode* instead of SDOperand). by Evan Cheng · 19 years ago
- 3029f92 Adjust to MachineConstantPool interface change: instead of keeping a by Chris Lattner · 19 years ago
- 3416721 Change Select() from by Evan Cheng · 19 years ago
- c26017a Fix the Sparc backend with Evan's recent tblgen changes by Chris Lattner · 19 years ago
- 900c826 Use SelectRoot() as the entry to any tblgen based isel. by Evan Cheng · 19 years ago
- 7c90f73 Rename SPARC V8 target to be the LLVM SPARC target. by Chris Lattner · 19 years ago
- c275dfa Custom lower VAARG for the case when we are doing vaarg(double). In this by Chris Lattner · 19 years ago
- b8973bd Allow the specification of explicit alignments for constant pool entries. by Evan Cheng · 19 years ago
- c03468b add a missing break that caused a lot of failures last night :( by Chris Lattner · 19 years ago
- 7a4d291 treat conditional branches the same way as conditional moves (giving them by Chris Lattner · 19 years ago
- 6788faa compactify all of the integer conditional moves into one instruction that takes by Chris Lattner · 19 years ago
- 86638b9 Compile this: by Chris Lattner · 19 years ago
- b716343 I don't see why this optimization isn't safe, but it isn't, so disable it by Chris Lattner · 19 years ago
- 2adc05c Fix FP constants, and the SparcV8/2006-01-22-BitConvertLegalize.ll failure from last night by Chris Lattner · 19 years ago
- 3772bcb Revamp the ICC/FCC reading instructions to be parameterized in terms of the by Chris Lattner · 19 years ago
- 9072c05 Compile: by Chris Lattner · 19 years ago
- 76afdc9 First step towards V9 instructions in the V8 backend, two conditional move by Chris Lattner · 19 years ago
- dea9528 When lowering SELECT_CC, see if the input is a lowered SETCC. If so, fold by Chris Lattner · 19 years ago
- c6fd6cd Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. by Chris Lattner · 19 years ago
- 4a397e0 Implement isMaskedValueZeroForTargetNode for the various v8 selectcc nodes, by Chris Lattner · 19 years ago
- 44ea7b1 Use V8ISD::CALL instead of ISD::CALL by Chris Lattner · 19 years ago
- ee62557 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for by Nate Begeman · 19 years ago
- 4dcfaac Rest of subtarget support, remove references to ppc by Chris Lattner · 19 years ago
- 0577a22 Set SchedulingForLatency to be the default scheduling preference for all. by Evan Cheng · 19 years ago
- acc398c First part of bug 680: by Nate Begeman · 19 years ago
- 7558b0e Default scheduling preference is SchedulingForLatency. by Evan Cheng · 19 years ago
- 46030a6 implement support for f32 arguments past the first 6 words by Chris Lattner · 19 years ago
- 99cf509 Silly Sparc is big endian. If we have to load args out of incoming stack slots by Chris Lattner · 19 years ago
- f7511b4 Make sure that bool,byte and short arguments are the right type when loaded by Chris Lattner · 19 years ago
- 7f9975a Disable a broken optimization by Chris Lattner · 19 years ago
- 934ea49 Have legalize take care of DYNAMIC_STACKALLOC for us, implement llvm.stacksave/stackrestore. by Chris Lattner · 19 years ago
- bce8887 Implement DYNAMIC_STACKALLOC for V8 by Chris Lattner · 19 years ago
- d88fc03 bswap implementation by Nate Begeman · 19 years ago
- b99329e expand unsupported stacksave/stackrestore nodes by Chris Lattner · 19 years ago
- 4bb9102 Fix branches on FP compares by Chris Lattner · 19 years ago
- 138d322 fix a bug in my previous checkin by Chris Lattner · 19 years ago
- 72878a4 Give V8ISD nodes symbolic names in dumps by Chris Lattner · 19 years ago
- 35ef913 Add bswap, rotl, and rotr nodes by Nate Begeman · 19 years ago
- 7ec6a6e This is no longer needed by Chris Lattner · 19 years ago
- b9169ce Use Evan's outflag stuff to implement V8cmpicc. This allows us to write a by Chris Lattner · 19 years ago
- 3fbb726 Fix a bug in i32->f64 conversion lowering by Chris Lattner · 19 years ago
- cb83374 silence a bogus gcc warning by Chris Lattner · 19 years ago
- e0bce71 Had expand logic backward. by Jim Laskey · 19 years ago
- abf6d17 Added initial support for DEBUG_LABEL allowing debug specific labels to be by Jim Laskey · 19 years ago
- 941334f Remove some dead code. by Evan Cheng · 19 years ago
- 330ea12 fix something-o by Chris Lattner · 19 years ago
- 74fa64b implement vaarg. Varargs now should work. by Chris Lattner · 19 years ago
- c4769bb implement vastart. The dag isel compiles this: by Chris Lattner · 19 years ago
- 53e8845 make sure bit_converts are expanded by Chris Lattner · 19 years ago
- 3cb7187 fix the int<->fp instructions, which apparently take a single float register by Chris Lattner · 19 years ago
- a01874f Use BIT_CONVERT to simplify this code by Chris Lattner · 19 years ago