1. 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 17 years ago
  2. f02ca69 Fix JIT code emission of X86::MovePCtoStack. by Evan Cheng · 17 years ago
  3. 1314b00 Fold some and + shift in x86 addressing mode. by Evan Cheng · 17 years ago
  4. 5aaddaa aesthetic changes, no functionality change. Evan, it's not clear by Chris Lattner · 17 years ago
  5. 8a59448 Fix a long standing deficiency in the X86 backend: we would by Chris Lattner · 17 years ago
  6. 0d64287 Silence, accersed warning by Bill Wendling · 17 years ago
  7. 8368805 Fix the folding of multiplication into addresses on x86, which was broken by Dan Gohman · 17 years ago
  8. 96aaa54 Flag MOV32to32_ with EXTRACT_SUBREG. They should not be scheduled apart. by Evan Cheng · 17 years ago
  9. 74f87a6 Fix grammar in a comment. by Dan Gohman · 17 years ago
  10. 525178c Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to by Dan Gohman · 17 years ago
  11. 2fe1259 Partly revert invalid r41774 by Anton Korobeynikov · 17 years ago
  12. a37c9f7 When both x/y and x%y are needed (x and y both scalar integer), compute by Dan Gohman · 17 years ago
  13. 48d1e45 When mixing SSE and x87 codegen, it's possible to by Dale Johannesen · 17 years ago
  14. ef61ed3 TableGen no longer emit CopyFromReg nodes for implicit results in physical by Evan Cheng · 17 years ago
  15. cdd509a Apply feedback from previous patch. by Dale Johannesen · 17 years ago
  16. eaf0894 Enhance APFloat to retain bits of NaNs (fixes oggenc). by Dale Johannesen · 17 years ago
  17. badb2d2 When x86 addresses matching exceeds its recursion limit, check to by Dan Gohman · 17 years ago
  18. a1eb155 Use subregs to improve any_extend code generation when feasible. by Christopher Lamb · 17 years ago
  19. c59e521 Increase efficiency of sign_extend_inreg by using subregisters for truncation. As the README suggests sign_extend_subreg is selected to (sext(trunc)). by Christopher Lamb · 17 years ago
  20. f7ef26e divb / mulb outputs to ah. Under x86-64 it's not legal to read ah if the instruction requires a rex prefix (i.e. outputs to r8b, etc.). So issue shift right by 8 on AX and then truncate it to 8 bits instead. by Evan Cheng · 17 years ago
  21. cdbe4d3 Long double patch 8 of N: make it partially work in by Dale Johannesen · 17 years ago
  22. 6a30811 Get X86 long double calling convention to work by Dale Johannesen · 17 years ago
  23. 7afa166 Switch some multiplication instructions over to the new scheme for testing. by Evan Cheng · 17 years ago
  24. f6844ca Mac OS X X86-64 low 4G address not available. by Evan Cheng · 17 years ago
  25. 2dc6dc6 Change the x86 backend to use extract_subreg for truncation operations. Passes DejaGnu, SingleSource and MultiSource. by Christopher Lamb · 17 years ago
  26. cf5543c Minor bug. by Evan Cheng · 17 years ago
  27. 518143d Same goes for constantpool, etc. by Evan Cheng · 17 years ago
  28. a49ed78 Mac OS X x86-64 lower 4G address is not available. by Evan Cheng · 17 years ago
  29. dc9b3d0 Add const to CanBeFoldedBy, CheckAndMask, and CheckOrMask. by Dan Gohman · 17 years ago
  30. 849f214 Fix for PR 1505 (and 1489). Rewrite X87 register by Dale Johannesen · 17 years ago
  31. ea859be Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from by Dan Gohman · 17 years ago
  32. a1b253f Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll by Chris Lattner · 17 years ago
  33. f6e9353 Oops :) by Anton Korobeynikov · 17 years ago
  34. 33bf8c4 Don't allow MatchAddress recurse too much. This trims exponential by Anton Korobeynikov · 17 years ago
  35. a16b7cb Two changes: by Chris Lattner · 17 years ago
  36. 6241226 Fix a miscompilation in the addr mode code trying to implement X | C and by Chris Lattner · 18 years ago
  37. 706535d Linux GOT indirect reference is only necessary in PIC mode. by Evan Cheng · 18 years ago
  38. 7aa8a45 Adjust #includes to compensate for lost of DerivedTypes.h in TargetLowering.h by Reid Spencer · 18 years ago
  39. 7f70559 * PIC codegen for X86/Linux has been implemented by Anton Korobeynikov · 18 years ago
  40. 317848f Really big cleanup. by Anton Korobeynikov · 18 years ago
  41. 95b2c7d eliminate static ctors for Statistic objects. by Chris Lattner · 18 years ago
  42. a70d14b Fix for PR1062 by Dan Gohman. by Evan Cheng · 18 years ago
  43. f5da133 What should be the last unnecessary <iostream>s in the library. by Bill Wendling · 18 years ago
  44. ac0b6ae Detemplatize the Statistic class. The only type it is instantiated with by Chris Lattner · 18 years ago
  45. 953fa04 Revert an unintended change. by Evan Cheng · 18 years ago
  46. 28b51439 - Switch X86-64 JIT to large code size model. by Evan Cheng · 18 years ago
  47. 19f2ffc - Fix X86-64 JIT by temporarily disabling code that treats GV address as 32-bit by Evan Cheng · 18 years ago
  48. 0085a28 - Use a different wrapper node for RIP-relative GV, etc. by Evan Cheng · 18 years ago
  49. 4946399 Clean up. by Evan Cheng · 18 years ago
  50. d0ff02c Fix for PR1018 - Better support for X86-64 Linux in small code model. by Evan Cheng · 18 years ago
  51. c0f64ff Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead by Evan Cheng · 18 years ago
  52. b1409ce For unsigned 8-bit division. Use movzbw to set the lower 8 bits of AX while by Evan Cheng · 18 years ago
  53. 6345d75 Removed even more std::cerr and #include <iostream> things. by Bill Wendling · 18 years ago
  54. 7ce4578 Matches MachineInstr changes. by Evan Cheng · 18 years ago
  55. 5cd3e9f Add implicit use / def operands to created MI's. by Evan Cheng · 18 years ago
  56. 490ce1e Add all implicit defs to FP_REG_KILL mi. by Evan Cheng · 18 years ago
  57. d6373bc Fix a bug in SelectScalarSSELoad. Since the load is wrapped in a by Evan Cheng · 18 years ago
  58. 0d53826 Match tblegen changes. by Evan Cheng · 18 years ago
  59. d41b30d Unbreak VC++ build. by Jeff Cohen · 18 years ago
  60. 1509254 silence warning by Chris Lattner · 18 years ago
  61. 07e4b00 SelectScalarSSELoad should call CanBeFoldedBy as well. by Evan Cheng · 18 years ago
  62. 27e1fe9 Corrected load folding check. We need to start from the root of the sub-dag by Evan Cheng · 18 years ago
  63. 8b2794a Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. by Evan Cheng · 18 years ago
  64. 494cec6 Doh. This wasn't causing problems by luck. by Evan Cheng · 18 years ago
  65. f78ae9e fix compilation failure of smg2000 by Chris Lattner · 18 years ago
  66. 4fe4f25 Fold "zero extending vector loads" now that evan added the chain manip stuff. by Chris Lattner · 18 years ago
  67. 82a9164 ComplexPatterns sse_load_f32 and sse_load_f64 returns in / out chain operands. by Evan Cheng · 18 years ago
  68. a275ecb More isel time load folding checking for nodes that produce flag values. by Evan Cheng · 18 years ago
  69. 466685d Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. by Evan Cheng · 18 years ago
  70. 3a7cd95 completely disable folding of loads into scalar sse instructions and provide by Chris Lattner · 18 years ago
  71. 71f84de Not needed. by Evan Cheng · 18 years ago
  72. bcb9770 Added some eye-candy for Subtarget type checking by Anton Korobeynikov · 18 years ago
  73. c45a2c7 Remove a unnecessary check. by Evan Cheng · 18 years ago
  74. 0f27fc3 Fix a regression in the 32-bit port from the 64-bit port landing. by Chris Lattner · 18 years ago
  75. c356a57 Reflects MachineConstantPoolEntry changes. by Evan Cheng · 18 years ago
  76. 25ab690 Committing X86-64 support. by Evan Cheng · 18 years ago
  77. 1453de5 Oops. Bad typo. Without the check of N1.hasOneUse() bad things can happen. by Evan Cheng · 18 years ago
  78. 4a88858 Remove dead code. by Evan Cheng · 18 years ago
  79. 780413d Don't performance load/op/store transformation if op produces a floating point by Evan Cheng · 18 years ago
  80. e50794a - Enable x86 isel preprocessing by default unless -fast is specified. by Evan Cheng · 18 years ago
  81. 82a35b3 Avoid making unneeded load/mod/store transformation which can hurt performance. by Evan Cheng · 18 years ago
  82. 70e674e Add an optional pass to preprocess the DAG before x86 isel to allow selecting more load/mod/store instructions. by Evan Cheng · 18 years ago
  83. a4f0b3a s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| by Chris Lattner · 18 years ago
  84. 0b828e0 Do not use getTargetNode() and SelectNodeTo() which takes more than 3 by Evan Cheng · 18 years ago
  85. 95514ba SelectNodeTo now returns a SDNode*. by Evan Cheng · 18 years ago
  86. 9ade218 Select() no longer require Result operand by reference. by Evan Cheng · 18 years ago
  87. 0469990 Match tblgen changes; clean up. by Evan Cheng · 18 years ago
  88. eb8730d Doh. Incorrectly inverted condition. Also add a isOnlyUse check to match tablegen. by Evan Cheng · 18 years ago
  89. 23329f5 SelectNodeTo() may return a SDOperand that is different from the input. by Evan Cheng · 18 years ago
  90. 64a752f Match tablegen changes. by Evan Cheng · 18 years ago
  91. f4b4c41 Eliminate reachability matrix. It has to be calculated before any instruction by Evan Cheng · 18 years ago
  92. 2ef88a0 Match tablegen isel changes. by Evan Cheng · 18 years ago
  93. 4876dc5 Reflect change to AssignTopologicalOrder(). by Evan Cheng · 18 years ago
  94. 686c4a1 Use of vector<bool> causes some horrendous compile time regression (2x)! by Evan Cheng · 18 years ago
  95. db3cc3d Factor topological order code to SelectionDAG. Clean up. by Evan Cheng · 18 years ago
  96. 37e1803 Can't spell. by Evan Cheng · 18 years ago
  97. ba27731 Some clean up. by Evan Cheng · 18 years ago
  98. f2dfafc Rename IsFoldableBy to CanBeFoldedleBy by Evan Cheng · 18 years ago
  99. 2584d93 Node selected into address mode cannot be folded. by Evan Cheng · 18 years ago
  100. 63ce568 Another duh. Determine topological order before any target node is added. by Evan Cheng · 18 years ago