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gerrit-public.fairphone.software / platform / external / llvm / 4ee451de366474b9c228b4e5fa573795a715216d / lib / Target / X86 / X86ISelLowering.h
  1. 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 17 years ago
  2. 18efe26 Implement ctlz and cttz with bsr and bsf. by Evan Cheng · 17 years ago
  3. 27a6c73 Several changes: by Chris Lattner · 17 years ago
  4. 45b22fa Implement codegen for flt_rounds on x86 by Anton Korobeynikov · 17 years ago
  5. cc41586 Much improved pic jumptable codegen: by Evan Cheng · 17 years ago
  6. f1ba1ca Move the LowerMEMCPY and LowerMEMCPYCall to a common place. by Rafael Espindola · 17 years ago
  7. 3c3ddb3 Enable more fold (sext (load x)) -> (sext (truncate (sextload x))) by Evan Cheng · 17 years ago
  8. 2bd122c Loosen up iv reuse to allow reuse of the same stride but a larger type when truncating from the larger type to smaller type is free. by Evan Cheng · 17 years ago
  9. c85e171 Added tail call optimization to the x86 back end. It can be by Arnold Schwaighofer · 17 years ago
  10. 6d60cac LowerIntegerDivOrRem no longer exists. by Dan Gohman · 17 years ago
  11. 525178c Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to by Dan Gohman · 17 years ago
  12. e5f6204 Enabling new condition code modeling scheme. by Evan Cheng · 17 years ago
  13. 068317b Refactor the memcpy lowering for the x86 target. by Rafael Espindola · 17 years ago
  14. b94fc1b Fix a typo in a comment. by Dan Gohman · 17 years ago
  15. a37c9f7 When both x/y and x%y are needed (x and y both scalar integer), compute by Dan Gohman · 17 years ago
  16. 0488db9 Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after by Evan Cheng · 17 years ago
  17. f1fc3a8 Fix PR 1681. When X86 target uses +sse -sse2, by Dale Johannesen · 17 years ago
  18. 7d6ff3a X86ISD::TEST is dead. by Evan Cheng · 17 years ago
  19. 7effac5 Add support for functions with byval arguments on x86 by Rafael Espindola · 17 years ago
  20. 1b5dcc3 Initial support for calling functions with byval arguments on x86-64 by Rafael Espindola · 17 years ago
  21. 48884cd rename isOperandValidForConstraint to LowerAsmOperandForConstraint, by Chris Lattner · 17 years ago
  22. a2780e1 Move ReturnAddrIndex variable to X86MachineFunctionInfo structure. This fixed by Anton Korobeynikov · 17 years ago
  23. 61e729e More explicit keywords. by Dan Gohman · 17 years ago
  24. b116fac Trampoline codegen support for X86-32. by Duncan Sands · 17 years ago
  25. d300622 Re-apply 40504, but with a fix for the segfault it caused in oggenc: by Dan Gohman · 17 years ago
  26. 3e22947 Reverting 40504 for now. It's breaking oggenc. by Evan Cheng · 17 years ago
  27. d328383 Remove X86ISD::LOAD_PACK and X86ISD::LOAD_UA and associated code from the by Dan Gohman · 17 years ago
  28. 2365f51 Long live the exception handling! by Anton Korobeynikov · 17 years ago
  29. 2038252 Define non-intrinsic instructions for vector min, max, sqrt, rsqrt, and rcp, by Dan Gohman · 17 years ago
  30. ea859be Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from by Dan Gohman · 17 years ago
  31. 2f9bb1a Support for the special case of a vector with the canonical form: by Bill Wendling · 17 years ago
  32. b3a0417 Implement "general dynamic", "initial exec" and "local exec" TLS models for by Lauro Ramos Venancio · 17 years ago
  33. 57fc00d Implemented correct stack probing on mingw/cygwin for dynamic alloca's. by Anton Korobeynikov · 17 years ago
  34. eb8c74d remove some dead hooks by Chris Lattner · 17 years ago
  35. b445d0c remove some dead target hooks, subsumed by isLegalAddressingMode by Chris Lattner · 17 years ago
  36. c9addb7 implement the new addressing mode description hook. by Chris Lattner · 17 years ago
  37. 4234f57 switch TargetLowering::getConstraintType to take the entire constraint, by Chris Lattner · 17 years ago
  38. fa4bce2 repair x86 performance, dejagnu problems from previous change by Dale Johannesen · 17 years ago
  39. a8a155e More flexible TargetLowering LSR hooks for testing whether an immediate is by Evan Cheng · 17 years ago
  40. ae64219 X86-64 VACOPY needs custom expansion. va_list is a struct { i32, i32, i8*, i8* }. by Evan Cheng · 17 years ago
  41. 2db39b8 remove fastcc (not fastcall) support by Chris Lattner · 17 years ago
  42. 54e3efd add an accessor. by Chris Lattner · 17 years ago
  43. 09c75a4 pass the calling convention into Lower*CallTo, instead of using ad-hoc flags. by Chris Lattner · 17 years ago
  44. 3085e15 factor a bunch of code out of LowerCCCCallTo into a new LowerCallResult by Chris Lattner · 17 years ago
  45. cb18656 simplify result value lowering by splitting the selection of *where* to return by Chris Lattner · 17 years ago
  46. bcc5f36 Finish off bug 680, allowing targets to custom lower frame and return by Nate Begeman · 18 years ago
  47. b10308e Propagate changes from my local tree. This patch includes: by Anton Korobeynikov · 18 years ago
  48. 73d6cf1 - FCOPYSIGN custom lowering bug. Clear the sign bit of operand 0 first before by Evan Cheng · 18 years ago
  49. 68c47cb With SSE2, expand FCOPYSIGN to a series of SSE bitwise operations. by Evan Cheng · 18 years ago
  50. 0085a28 - Use a different wrapper node for RIP-relative GV, etc. by Evan Cheng · 18 years ago
  51. 8ca2932 Don't dag combine floating point select to max and min intrinsics. Those by Evan Cheng · 18 years ago
  52. 6e56e2c Fixed a bug which causes x86 be to incorrectly match by Evan Cheng · 18 years ago
  53. 22aaf1d allow the address of a global to be used with the "i" constraint when in by Chris Lattner · 18 years ago
  54. f686d9b Fixed a significant bug where unpcklpd is incorrectly used to extract element 1 from a v2f64 value. by Evan Cheng · 18 years ago
  55. 7fbe972 Implement branch analysis/xform hooks required by the branch folding pass. by Chris Lattner · 18 years ago
  56. 9189777 fit in 80 cols by Chris Lattner · 18 years ago
  57. 6458f18 update comments by Chris Lattner · 18 years ago
  58. f824868 Adding codegeneration for StdCall & FastCall calling conventions by Anton Korobeynikov · 18 years ago
  59. 734503b X86ISD::CMP now produces a chain as well as a flag. Make that the chain by Evan Cheng · 18 years ago
  60. 25ab690 Committing X86-64 support. by Evan Cheng · 18 years ago
  61. f76d180 Fix PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll. by Chris Lattner · 18 years ago
  62. f4dff84 Implement the inline asm 'A' constraint. This implements PR825 and by Chris Lattner · 18 years ago
  63. 206ee9d X86 target specific DAG combine: turn build_vector (load x), (load x+4), by Evan Cheng · 18 years ago
  64. da08d2c Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary. by Evan Cheng · 18 years ago
  65. 32fe103 Switch X86 over to a call-selection model where the lowering code creates by Evan Cheng · 18 years ago
  66. d74ea2b Patches to make the LLVM sources more -pedantic clean. Patch provided by Chris Lattner · 18 years ago
  67. 25caf63 Remove PreprocessCCCArguments and PreprocessFastCCArguments now that by Evan Cheng · 18 years ago
  68. 2d29709 Implement an annoying part of the Darwin/X86 abi: the callee of a struct by Chris Lattner · 18 years ago
  69. 4ac8974 Should pass by reference. by Evan Cheng · 18 years ago
  70. eda65fa - Clean up formal argument lowering code. Prepare for vector pass by value work. by Evan Cheng · 18 years ago
  71. 1bc7804 Switching over FORMAL_ARGUMENTS mechanism to lower call arguments. by Evan Cheng · 18 years ago
  72. 0db9fe6 Separate LowerOperation() into multiple functions, one per opcode. by Evan Cheng · 18 years ago
  73. 017dcc6 Now generating perfect (I think) code for "vector set" with a single non-zero by Evan Cheng · 18 years ago
  74. 39623da - Added support to turn "vector clear elements", e.g. pand V, <-1, -1, 0, -1> by Evan Cheng · 18 years ago
  75. 533a0aa Commute vector_shuffle to match more movlhps, movlp{s|d} cases. by Evan Cheng · 18 years ago
  76. d953947 Last few SSE3 intrinsics. by Evan Cheng · 18 years ago
  77. d6d1cbd Added support for _mm_move_ss and _mm_move_sd. by Evan Cheng · 18 years ago
  78. 5ced1d8 - movlp{s|d} and movhp{s|d} support. by Evan Cheng · 18 years ago
  79. 6be2c58 Support for comi / ucomi intrinsics. by Evan Cheng · 18 years ago
  80. 1d5a8cc Handle canonical form of e.g. vector_shuffle v1, v1, <0, 4, 1, 5, 2, 6, 3, 7> by Evan Cheng · 18 years ago
  81. 653159f Use a X86 target specific node X86ISD::PINSRW instead of a mal-formed by Evan Cheng · 18 years ago
  82. b067a1e Add support to use pextrw and pinsrw to extract and insert a word element by Evan Cheng · 18 years ago
  83. 506d3df - Added some SSE2 128-bit packed integer ops. by Evan Cheng · 18 years ago
  84. 2064a2b * Prefer using operation of matching types. e.g unpcklpd rather than movlhps. by Evan Cheng · 18 years ago
  85. 4fcb922 - Clean up / consoladate various shuffle masks. by Evan Cheng · 18 years ago
  86. 0038e59 Model unpack lower and interleave as vector_shuffle so we can lower the by Evan Cheng · 18 years ago
  87. ffea91e Remove X86:isZeroVector, use ISD::isBuildVectorAllZeros instead; some fixes / cleanups by Evan Cheng · 18 years ago
  88. c60bd97 Build arbitrary vector with more than 2 distinct scalar elements with a by Evan Cheng · 18 years ago
  89. bc4832b Support for scalar to vector with zero extension. by Evan Cheng · 18 years ago
  90. 386031a Handle BUILD_VECTOR with all zero elements. by Evan Cheng · 18 years ago
  91. 2c0dbd0 More efficient v2f64 shuffle using movlhps, movhlps, unpckhpd, and unpcklpd. by Evan Cheng · 18 years ago
  92. 14aed5e Handle more shuffle cases with SHUFP* instructions. by Evan Cheng · 18 years ago
  93. ca6e8ea Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do by Evan Cheng · 18 years ago
  94. 0188ecb - Implement X86ISelLowering::isShuffleMaskLegal(). We currently only support by Evan Cheng · 18 years ago
  95. 63d3300 - VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matches by Evan Cheng · 18 years ago
  96. b9df0ca Some splat and shuffle support. by Evan Cheng · 18 years ago
  97. 48090aa - Use movaps to store 128-bit vector integers. by Evan Cheng · 18 years ago
  98. c4c6257 Added getTargetLowering() to TargetMachine. Refactored targets to support this. by Evan Cheng · 18 years ago
  99. 020d2e8 - Clean up the lowering and selection code of ConstantPool, GlobalAddress, by Evan Cheng · 18 years ago
  100. a0ea053 PIC related bug fixes. by Evan Cheng · 18 years ago