- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 17 years ago
- 627c00b Add "mayHaveSideEffects" and "neverHasSideEffects" flags to some instructions. I by Bill Wendling · 17 years ago
- 691de38 LD_Fp64m should have "isRematerializable" set. by Bill Wendling · 17 years ago
- 45b22fa Implement codegen for flt_rounds on x86 by Anton Korobeynikov · 17 years ago
- 48abc5c Corrected many typing errors. And removed 'nest' parameter handling by Arnold Schwaighofer · 17 years ago
- e5f6204 Enabling new condition code modeling scheme. by Evan Cheng · 17 years ago
- 4e4d2d7 New style x87 cmp instructions. by Evan Cheng · 17 years ago
- 0488db9 Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after by Evan Cheng · 17 years ago
- f1fc3a8 Fix PR 1681. When X86 target uses +sse -sse2, by Dale Johannesen · 17 years ago
- 24f2ea3 Add implicit def of EFLAGS on those instructions that may modify flags. by Evan Cheng · 17 years ago
- 071a279 Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead. by Evan Cheng · 17 years ago
- 2f39426 Mark load instructions with isLoad = 1. by Evan Cheng · 17 years ago
- cdbe4d3 Long double patch 8 of N: make it partially work in by Dale Johannesen · 17 years ago
- a996d52 Long double patch 7 of N, unless I lost count:). by Dale Johannesen · 17 years ago
- 6a30811 Get X86 long double calling convention to work by Dale Johannesen · 17 years ago
- 59a5873 Long double patch 4 of N: initial x87 implementation. by Dale Johannesen · 17 years ago
- b1576f5 Change the x86 assembly output to use tab characters to separate the by Dan Gohman · 17 years ago
- c64a1a9 Redo and generalize previously removed opt for pinsrw: (vextract (v4i32 bc (v4f32 s2v (f32 load ))), 0) -> (i32 load ) by Evan Cheng · 17 years ago
- ffbacca No more noResults. by Evan Cheng · 17 years ago
- 64d80e3 Change instruction description to split OperandList into OutOperandList and by Evan Cheng · 17 years ago
- afdc7fd Fix fp_constant_op failure. by Dale Johannesen · 17 years ago
- bf6b827 fix 80 columnn violations, increasing the world's pedantic satisfaction level. by Dale Johannesen · 17 years ago
- e377d4d Refactor X87 instructions. As a side effect, all their names are changed. by Dale Johannesen · 17 years ago
- 411d9c5 Some spacing fixes. Cosmetic. by Dale Johannesen · 17 years ago
- 849f214 Fix for PR 1505 (and 1489). Rewrite X87 register by Dale Johannesen · 17 years ago
- d45eddd Revert the earlier change that removed the M_REMATERIALIZABLE machine by Dan Gohman · 17 years ago
- 82a87a0 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad by Dan Gohman · 17 years ago
- 7681435 Mark re-materializable instructions. by Evan Cheng · 17 years ago
- 8b2794a Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. by Evan Cheng · 18 years ago
- 466685d Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. by Evan Cheng · 18 years ago
- 386031a Handle BUILD_VECTOR with all zero elements. by Evan Cheng · 18 years ago
- 2246f84 Use the generic vector register classes VR64 / VR128 rather than V4F32, by Evan Cheng · 18 years ago
- 06a8aa1 Move some pattern fragments to the right files. by Evan Cheng · 18 years ago
- 4e4c71e One more round of reorg so sabre doesn't freak out. :-) by Evan Cheng · 18 years ago
- bf156d1 Moving things to their proper places. by Evan Cheng · 18 years ago
- ffcb95b Split instruction info into multiple files, one for each of x87, MMX, and SSE. by Evan Cheng · 18 years ago