- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 17 years ago
- 627c00b Add "mayHaveSideEffects" and "neverHasSideEffects" flags to some instructions. I by Bill Wendling · 17 years ago
- 6e141fd Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled. by Evan Cheng · 17 years ago
- 8a59448 Fix a long standing deficiency in the X86 backend: we would by Chris Lattner · 17 years ago
- 071a279 Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead. by Evan Cheng · 17 years ago
- 2f39426 Mark load instructions with isLoad = 1. by Evan Cheng · 17 years ago
- 73a902b Mark the SSE and MMX load instructions that by Dan Gohman · 17 years ago
- b1576f5 Change the x86 assembly output to use tab characters to separate the by Dan Gohman · 17 years ago
- c64a1a9 Redo and generalize previously removed opt for pinsrw: (vextract (v4i32 bc (v4f32 s2v (f32 load ))), 0) -> (i32 load ) by Evan Cheng · 17 years ago
- 64d80e3 Change instruction description to split OperandList into OutOperandList and by Evan Cheng · 17 years ago
- 10404c4 Support generation of GR64 to MMX code in the JIT. by Bill Wendling · 17 years ago
- 9388842 Allow a GR64 to be moved into an MMX register via the "movd" instruction. by Bill Wendling · 17 years ago
- d45eddd Revert the earlier change that removed the M_REMATERIALIZABLE machine by Dan Gohman · 17 years ago
- 82a87a0 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad by Dan Gohman · 17 years ago
- 738a6ec implement the missing maskmovq mmx intrinsic that akor hit. by Chris Lattner · 17 years ago
- 69dc533 Add the final MMX instructions. Correct a few wrong patterns. by Bill Wendling · 17 years ago
- 71bfd11 Adding more MMX instructions. by Bill Wendling · 17 years ago
- 823efee Add FEMMS and ADDQ. Renamed MMX recipes to prepend the MMX_ to them. by Bill Wendling · 17 years ago
- 826f36f Unbreak mmx arithmetic. It was barfing trying to do v8i8 arithmetic. by Bill Wendling · 17 years ago
- 6dc29ec Add the "unpack low packed data" instructions. This should be the last of by Bill Wendling · 17 years ago
- ccc44ad Fix so that pandn is emitted instead of an xor/and combo. Add integer by Bill Wendling · 17 years ago
- eebc8a1 Add support for the v1i64 type. This makes better code for this: by Bill Wendling · 17 years ago
- b8440a0 PR1260: Add final support to get the QT example to compile. by Bill Wendling · 17 years ago
- 02ced83 We generate a shufflevector instruction, so we don't need the builtin intrinsic. by Bill Wendling · 17 years ago
- a348c56 Support added for shifts and unpacking MMX instructions. by Bill Wendling · 17 years ago
- 1b7a81d And now support for MMX logical operations. by Bill Wendling · 17 years ago
- 74027e9 Multiplication support for MMX. by Bill Wendling · 17 years ago
- c1fb047 Adding more arithmetic operators to MMX. This is an almost exact copy of by Bill Wendling · 17 years ago
- 2f88dcd Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that by Bill Wendling · 17 years ago
- c32a7f9 Remove useless pattern fragments. by Bill Wendling · 17 years ago
- bc9bffa Properly support v8i8 and v4i16 types. It now converts them to v2i32 for by Bill Wendling · 17 years ago
- a31bd27 Add LOAD/STORE support for MMX. by Bill Wendling · 17 years ago
- 229baff Add the emms intrinsic for MMX support. by Bill Wendling · 17 years ago
- 1693e48 INC / DEC instructions have shorter code size than ADD32ri8, etc. by Evan Cheng · 18 years ago
- 069287d X86 integer register classes naming changes. Make them consistent with FP, vector classes. by Evan Cheng · 18 years ago
- d2a6d54 SSE / SSE2 conversion intrinsics. by Evan Cheng · 18 years ago
- fcf5e21 movnt* and maskmovdqu intrinsics by Evan Cheng · 18 years ago
- cc4f047 Instruction encoding bug by Evan Cheng · 18 years ago
- 3246e06 Added CVTTPS2PI. by Evan Cheng · 18 years ago
- 4a7da36 Didn't mean to check this in. No MMX support yet. by Evan Cheng · 18 years ago
- 48090aa - Use movaps to store 128-bit vector integers. by Evan Cheng · 18 years ago
- 82521dd - Remove scalar to vector pseudo ops. They are just wrong. by Evan Cheng · 18 years ago
- 811ec1c x86 ISD::SCALAR_TO_VECTOR support. by Evan Cheng · 18 years ago
- ba753c6 Move a few things around. by Evan Cheng · 18 years ago
- 4e4c71e One more round of reorg so sabre doesn't freak out. :-) by Evan Cheng · 18 years ago
- ffcb95b Split instruction info into multiple files, one for each of x87, MMX, and SSE. by Evan Cheng · 18 years ago