- 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 17 years ago
- 627c00b Add "mayHaveSideEffects" and "neverHasSideEffects" flags to some instructions. I by Bill Wendling · 17 years ago
- 0c5a507 Actually, MOVPQIto64mr is a dup of MOVPQI2QImr, MOV64toPQIrm is a dup of MOVQI2PQIrm. by Evan Cheng · 17 years ago
- 2023ed7 Fix (mem) <-> low 64-bits of xmm bugs pointed out by David Greene. Mac OS X Leopard assembler recognizes movq. by Evan Cheng · 17 years ago
- fd9e473 Fix bsf / bsr jit encoding. by Evan Cheng · 17 years ago
- 8ec8611 Oops. Forgot these. by Evan Cheng · 17 years ago
- 1a8001e Fix Intel asm syntax for the bsr and bsf instructions. by Dan Gohman · 17 years ago
- 18efe26 Implement ctlz and cttz with bsr and bsf. by Evan Cheng · 17 years ago
- 6e141fd Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled. by Evan Cheng · 17 years ago
- 20ab290 Add a flag for indirect branch instructions. by Owen Anderson · 17 years ago
- 66f7163 Local spiller optimization: by Evan Cheng · 17 years ago
- 48abc5c Corrected many typing errors. And removed 'nest' parameter handling by Arnold Schwaighofer · 17 years ago
- c85e171 Added tail call optimization to the x86 back end. It can be by Arnold Schwaighofer · 17 years ago
- 7ad42d9 Commute x86 cmove instructions by swapping the operands and change the condition by Evan Cheng · 17 years ago
- b952d1f Add support to convert more 64-bit instructions to 3-address instructions. by Evan Cheng · 17 years ago
- 3154cb6 ADC and SBB uses EFLAGS. by Evan Cheng · 17 years ago
- e5f6204 Enabling new condition code modeling scheme. by Evan Cheng · 17 years ago
- 1ed37fd Doh. Calls clobber EFLAGS. by Evan Cheng · 17 years ago
- bf4f89d Some assemblers do not recognize aliases pushfd, pushfq, popfd, and popfq. Just emit them as pushf and popf. by Evan Cheng · 17 years ago
- 8d5562b Typos: POPQ -> POPFQ, POPD -> POPFD. by Evan Cheng · 17 years ago
- 2f245ba Add pushf{d|q}, popf{d|q} to push and pop EFLAGS register. by Evan Cheng · 17 years ago
- 0488db9 Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after by Evan Cheng · 17 years ago
- 9590624 Use xorl instead of xorq to enter a zero into a 64-bit register. by Dan Gohman · 17 years ago
- 11f7bfb Use "test reg,reg" in place of "cmp reg,0" for 64-bit operands. This was by Dan Gohman · 17 years ago
- e47f1f9 Add patterns for SHLD64* and SHRD64*. by Dan Gohman · 17 years ago
- 24f2ea3 Add implicit def of EFLAGS on those instructions that may modify flags. by Evan Cheng · 17 years ago
- 071a279 Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead. by Evan Cheng · 17 years ago
- 1ab7989 Avoid storing and reloading zeros and other constants from stack slots by Dan Gohman · 17 years ago
- 2f39426 Mark load instructions with isLoad = 1. by Evan Cheng · 17 years ago
- 0db079e Mac OS X X86-64 low 4G address not available. by Evan Cheng · 17 years ago
- b1576f5 Change the x86 assembly output to use tab characters to separate the by Dan Gohman · 17 years ago
- c64a1a9 Redo and generalize previously removed opt for pinsrw: (vextract (v4i32 bc (v4f32 s2v (f32 load ))), 0) -> (i32 load ) by Evan Cheng · 17 years ago
- 2dc6dc6 Change the x86 backend to use extract_subreg for truncation operations. Passes DejaGnu, SingleSource and MultiSource. by Christopher Lamb · 17 years ago
- 6a20cf0 Add missing SSE builtins: by Bill Wendling · 17 years ago
- ffbacca No more noResults. by Evan Cheng · 17 years ago
- 64d80e3 Change instruction description to split OperandList into OutOperandList and by Evan Cheng · 17 years ago
- 638c96d Define the pushq instruction for x86-64. by Dan Gohman · 17 years ago
- a066810 add support for 128-bit integer add/sub by Chris Lattner · 17 years ago
- bff35d1 Have MMX registers clobbered in x86-64 too. by Bill Wendling · 17 years ago
- 9156ec6 Some AT&T syntax assembler (e.g. Mac OS X) does not recognize the movq alias for i64 <-> XMM moves. by Evan Cheng · 18 years ago
- 21b7612 f64 <-> i64 bit_convert using movq in 64-bit mode. by Evan Cheng · 18 years ago
- e36087c Fix a couple of typo's. by Evan Cheng · 18 years ago
- 28b51439 - Switch X86-64 JIT to large code size model. by Evan Cheng · 18 years ago
- 19f2ffc - Fix X86-64 JIT by temporarily disabling code that treats GV address as 32-bit by Evan Cheng · 18 years ago
- 0085a28 - Use a different wrapper node for RIP-relative GV, etc. by Evan Cheng · 18 years ago
- 7bb64e8 Fix JIT encoding bugs for shift / rotate by one ops. by Evan Cheng · 18 years ago
- ebf01d6 Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64. by Evan Cheng · 18 years ago
- 3751844 remove dead/redundant vars by Chris Lattner · 18 years ago
- af9db75 Add properties to ComplexPattern. by Evan Cheng · 18 years ago
- 466685d Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. by Evan Cheng · 18 years ago
- 734503b X86ISD::CMP now produces a chain as well as a flag. Make that the chain by Evan Cheng · 18 years ago
- 36978b9 Remove TEST64mr. It's same as TEST64rm since and is commutative. by Evan Cheng · 18 years ago
- 25ab690 Committing X86-64 support. by Evan Cheng · 18 years ago