1. 4ee451d Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 17 years ago
  2. f191c80 Use TableGen to emit information for dwarf register numbers. by Anton Korobeynikov · 17 years ago
  3. 7a42f24 Revert previous rewrite per chris's comments. by Dale Johannesen · 17 years ago
  4. 3556bc1 Rewrite Dwarf number handling per review comments. by Dale Johannesen · 17 years ago
  5. 4542edc Complete conditionalization of Dwarf reg numbers. by Dale Johannesen · 17 years ago
  6. 48abc5c Corrected many typing errors. And removed 'nest' parameter handling by Arnold Schwaighofer · 17 years ago
  7. dcfa73f Set CCR (EFLAGS) copy cost to -1, i.e. extremely expensive to copy. by Evan Cheng · 17 years ago
  8. 3054dde Added status flags register: EFLAGS. by Evan Cheng · 17 years ago
  9. a3231ba Temporarily backing out this change until we know why some dejagnu tests are failing. by Evan Cheng · 17 years ago
  10. a333b41 GR16_ sub-register class should be GR8_, not GR8. That is, it should only be 8-bit registers in 32-bit mode. Ditto for GR32_. by Evan Cheng · 17 years ago
  11. 59a5873 Long double patch 4 of N: initial x87 implementation. by Dale Johannesen · 17 years ago
  12. f9b90ea Add register info needed to use subreg sets on X86. by Christopher Lamb · 17 years ago
  13. 849f214 Fix for PR 1505 (and 1489). Rewrite X87 register by Dale Johannesen · 17 years ago
  14. 038082d Emit correct DWARF reg # for RA (return address) register by Anton Korobeynikov · 17 years ago
  15. 6120433 Specify sub-register relations. e.g. RAX: [EAX], EAX: [AX], AX: [AL,AH]. by Evan Cheng · 17 years ago
  16. eebc8a1 Add support for the v1i64 type. This makes better code for this: by Bill Wendling · 17 years ago
  17. dc77540 hasFP() is now a virtual method of MRegisterInfo. by Evan Cheng · 18 years ago
  18. 25ab690 Committing X86-64 support. by Evan Cheng · 18 years ago
  19. 5ea64fd Constify some methods. Patch provided by Anton Vayvod, thanks! by Chris Lattner · 18 years ago
  20. e46e1a5 Make XMM, FP register dwarf register numbers consistent with gcc. by Evan Cheng · 18 years ago
  21. 6b59a36 Get darwin intel debugging up and running. by Jim Laskey · 18 years ago
  22. 069287d X86 integer register classes naming changes. Make them consistent with FP, vector classes. by Evan Cheng · 18 years ago
  23. 403be7e Fixing truncate. Previously we were emitting truncate from r16 to r8 as by Evan Cheng · 18 years ago
  24. 7481145 Typo's by Evan Cheng · 18 years ago
  25. 47622e3 Add dwarf register numbering to register data. by Jim Laskey · 18 years ago
  26. 5c791c8 Junk unused vector register classes. by Evan Cheng · 18 years ago
  27. 933be33 Added SSE2 128-bit integer packed types: V16I8, V8I16, V4I32, and V2I64. by Evan Cheng · 18 years ago
  28. aea20f5 Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit by Evan Cheng · 18 years ago
  29. 71fb9ad Remove the uses of STATUS flag register. Rely on node property SDNPInFlag, by Evan Cheng · 19 years ago
  30. 5bc4da4 Bye bye HACKTROCITY. by Evan Cheng · 19 years ago
  31. b077b84 * Added lowering hook for external weak global address. It inserts a load by Evan Cheng · 19 years ago
  32. bbc8ddb SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns. by Evan Cheng · 19 years ago
  33. aed7c72 Added support for cmp, test, and conditional move instructions. by Evan Cheng · 19 years ago
  34. 6510b22 Support multiple ValueTypes per RegisterClass, needed for upcoming vector by Nate Begeman · 19 years ago
  35. 14e2cf6 Properly split f32 and f64 into separate register classes for scalar sse fp by Nate Begeman · 19 years ago
  36. ecbce61 Split RegisterClass 'Methods' into MethodProtos and MethodBodies by Chris Lattner · 19 years ago
  37. 03ba7b9 Put register classes into namespaces by Chris Lattner · 19 years ago
  38. f63be7d First round of support for doing scalar FP using the SSE2 ISA extension and by Nate Begeman · 19 years ago
  39. f1702ac Initial set of .td file changes necessary to get scalar fp in xmm registers by Nate Begeman · 19 years ago
  40. 0539313 Minor optimization to allocate R8 registers in a better order. by Chris Lattner · 20 years ago
  41. 45de191 Spill/restore X86 floating point stack registers with 64-bits of precision by Chris Lattner · 20 years ago
  42. 65cbfa0 The real x87 floating point registers should not be allocatable. They by Alkis Evlogimenos · 20 years ago
  43. a270019 Fit long lines into 80 cols via creative space elimination by Misha Brukman · 20 years ago
  44. b228657 Revamp the Register class, and allow the use of the RegisterGroup class to by Chris Lattner · 20 years ago
  45. 47d2f2b Nuke commented out stuff by Chris Lattner · 20 years ago
  46. ff0a6e6 Switch from bytes to bits for alignment for consistency by Chris Lattner · 20 years ago
  47. 068758e give FP stack registers names by Chris Lattner · 20 years ago
  48. 9c22aeb Improve allocation order: by Alkis Evlogimenos · 20 years ago
  49. 856ba76 Added LLVM copyright header. by John Criswell · 21 years ago
  50. bf2f8a9 Converted tabs to spaces. by Misha Brukman · 21 years ago
  51. 69666e5 This register is never used, disable it. by Chris Lattner · 21 years ago
  52. 6770aed Rename register classes to be upper case to make it obvious that they are X86 by Chris Lattner · 21 years ago
  53. c8f4587 transition to using let instead of set by Chris Lattner · 21 years ago
  54. 7af9a38 Specify custom name for registers to get the ()'s in the name. by Chris Lattner · 21 years ago
  55. 9eab316 The RegisterInfo class is obsolete by Chris Lattner · 21 years ago
  56. b76d6fc Initial checkin of X86 Register File description by Chris Lattner · 21 years ago