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gerrit-public.fairphone.software / platform / external / llvm / 6585b51821847df582b568a63298c506cd26c3a4 / lib
  1. 6585b51 Correct description string of enable-mips-delay-filler. by Akira Hatanaka · 13 years ago
  2. bb73468 Look at the number of entries in the jump table and jump to a 'trap' block if by Bill Wendling · 13 years ago
  3. 2a85015 Checkpoint for SJLJ EH code. by Bill Wendling · 13 years ago
  4. 200a8ce Also add <imp-use,kill> flags for redefined super-registers. by Jakob Stoklund Olesen · 13 years ago
  5. b077cf3 Also add <def,undef> flags when coalescing sub-registers. by Jakob Stoklund Olesen · 13 years ago
  6. 2fec6c5 Teach the MC to output code/data region marker labels in MachO and ELF modes. These are used by disassemblers to provide better disassembly, particularly on targets like ARM Thumb that like to intermingle data in the TEXT segment. by Owen Anderson · 13 years ago
  7. 9e5887b Adding back support for printing operands symbolically to ARM's new disassembler by Kevin Enderby · 13 years ago
  8. a8512ed Create a mapping between the landing pad basic block and the call site index for later use. by Bill Wendling · 13 years ago
  9. 7016cf6 Allow <undef> flags on def operands as well as uses. by Jakob Stoklund Olesen · 13 years ago
  10. 11ad7e5 Replace snprintf with raw_string_ostream. by Francois Pichet · 13 years ago
  11. cedaae1 Allow Operator Arguments by David Greene · 13 years ago
  12. a589b1f Unbreak CMake build. by Ted Kremenek · 13 years ago
  13. 58c6200 Put GCOVFile and other related interface in a common header so that llvm-cov tool can share it with GCOV writer. by Devang Patel · 13 years ago
  14. 1f121e8 Unbreak MSVC build. by Francois Pichet · 13 years ago
  15. 01faf43 Teach PPCInstrInfo to handle sub-classes. by Jakob Stoklund Olesen · 13 years ago
  16. f987425 tblgen: add preprocessor as a separate mode by Che-Liang Chiou · 13 years ago
  17. 34804c4 Set operation actions to legal types only. by Nadav Rotem · 13 years ago
  18. e878309 Operations should be custom lowered only if their type is legal. by Nadav Rotem · 13 years ago
  19. e97728e The product of two chrec's can always be represented as a chrec. by Nick Lewycky · 13 years ago
  20. 6744a17 Add support in the disassembler for ignoring the L-bit on certain VEX instructions. Mark instructions that have this behavior. Fixes PR10676. by Craig Topper · 13 years ago
  21. f143b79 LSR should avoid redundant edge splitting. by Andrew Trick · 13 years ago
  22. 2aeb802 whitespace by Andrew Trick · 13 years ago
  23. b3c4e26 Remove last references to hotpatch. by Rafael Espindola · 13 years ago
  24. da7e6a9 Generic cleanup. by Bill Wendling · 13 years ago
  25. 9d39036 ARM assembly parsing and encoding for VMOV immediate. by Jim Grosbach · 13 years ago
  26. 2a3f19d Tidy up. 80 columns. by Jim Grosbach · 13 years ago
  27. ff4216a Use the PC label ID rather than '1'. Add support for thumb-2, because I heard that some people use it. by Bill Wendling · 13 years ago
  28. f8520d5 Don't carry over the dispatchsetup hack from the old system. by Bill Wendling · 13 years ago
  29. 6825914 ARM parsing/encoding for VCMP/VCMPE. by Jim Grosbach · 13 years ago
  30. 03dd4e8 Fix typo in comments. by Nick Lewycky · 13 years ago
  31. f7e4aef Check-pointing the new SjLj EH lowering. by Bill Wendling · 13 years ago
  32. 43e43f7 Add support for 64-bit logical NOR. by Akira Hatanaka · 13 years ago
  33. 2d57088 Add support for 64-bit count leading ones and zeros instructions. by Akira Hatanaka · 13 years ago
  34. 631d117 Move the grabbing of the jump buffer into the caller function, eliminating the need for returning a std::pair. by Bill Wendling · 13 years ago
  35. 5cd5ac6 ARM assembly parsing and encoding for VMRS/FMSTAT. by Jim Grosbach · 13 years ago
  36. dda4a07 Add support for 64-bit divide instructions. by Akira Hatanaka · 13 years ago
  37. 0e6a24d Add C api for Instruction->eraseFromParent(). by Devang Patel · 13 years ago
  38. b95ed6e Thumb2 ADD/SUB can take SP as a destination register. by Jim Grosbach · 13 years ago
  39. 2ad7668 Clean up MipsInstrInfo::copyPhysReg and handle copies from and to 64-bit integer by Akira Hatanaka · 13 years ago
  40. 04d3762 Add support for 64-bit integer multiply instructions. by Akira Hatanaka · 13 years ago
  41. 3678793 Add definitions of instructions which move values between 64-bit integer by Akira Hatanaka · 13 years ago
  42. 581fe82 Add support for MOVBE and RDRAND instructions for the assembler and disassembler. Includes feature flag checking, but no instrinsic support. Fixes PR10832, PR11026 and PR11027. by Craig Topper · 13 years ago
  43. 8cf5e74 Whitespace. by Eric Christopher · 13 years ago
  44. 1aeb7ac Typo. by Eric Christopher · 13 years ago
  45. 25456ef Add the returns_twice attribute to LLVM. by Rafael Espindola · 13 years ago
  46. 04c5be9 Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to registers xmm8-xmm15 outside 64-bit mode. by Craig Topper · 13 years ago
  47. 7b22976 Fix VEX disassembling to ignore REX.RXBW bits in 32-bit mode. by Craig Topper · 13 years ago
  48. 1cbae18 Reapply r140979 with fix! We never did get a testcase, but careful review of the by Nick Lewycky · 13 years ago
  49. 4fcc80a Revert r140979 due to reports of bootstrap failure. by Nick Lewycky · 13 years ago
  50. 8fde4f5 Add one more case we compute a max trip count. by Nick Lewycky · 13 years ago
  51. 82f131a Fix some Intel syntax disassembly issues with instructions that implicitly use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST. by Craig Topper · 13 years ago
  52. 146c6d7 Special case disassembler handling of REX.B prefix on NOP instruction to decode as XCHG R8D, EAX instead. Fixes PR10344. by Craig Topper · 13 years ago
  53. 11357d4 Add a new icmp+select optz'n. Also shows off the load(cst) folding added in by Nick Lewycky · 13 years ago
  54. 267236a Enhance a couple places where we were doing constant folding of instructions, by Nick Lewycky · 13 years ago
  55. 846a2dc Fix disassembling of INVEPT and INVVPID to take operands by Craig Topper · 13 years ago
  56. e1b4a1a Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2 as an opcode extension and allows the opsize prefix. This necessitated adding IC_XD_OPSIZE and IC_64BIT_XD_OPSIZE contexts. Unfortunately, this increases the size of the disassembler tables. Fixes PR10702. by Craig Topper · 13 years ago
  57. 2bfaf52 Revert r140924 "Attempt to fix dynamic stack realignment for thumb1 functions." by Chad Rosier · 13 years ago
  58. cbf26e3 Moved type construction out of the loop and added an assert on the legality of the type. Formatted lines to the 80 char limit. by Nadav Rotem · 13 years ago
  59. 7c78888 Move TableGen's parser and entry point into a library by Peter Collingbourne · 13 years ago
  60. 2e6b97b No one should be using the method directly. Assert if they do. by Bill Wendling · 13 years ago
  61. 405ca13 Add a convenience method to tell if two things are equal. by Bill Wendling · 13 years ago
  62. 3320f2a Use the ARMConstantPoolMBB class to handle the MBB values. by Bill Wendling · 13 years ago
  63. 9c18f51 Add ARMConstantPoolMBB to hold an MBB value in the constant pool. by Bill Wendling · 13 years ago
  64. 14a1a6b Remove dead code. by Bill Wendling · 13 years ago
  65. 9aca75c Remove now dead methods and ivar. by Bill Wendling · 13 years ago
  66. fe31e67 Use the new ARMConstantPoolSymbol class to handle external symbols. by Bill Wendling · 13 years ago
  67. ff4a802 Add an ARMConstantPool class for external symbols. This will split out the support for external symbols from the base class. by Bill Wendling · 13 years ago
  68. 3f4e459 Remove now dead methods and ivar from ARMConstantPoolValue. by Bill Wendling · 13 years ago
  69. 5bb7799 Switch over to using ARMConstantPoolConstant for global variables, functions, by Bill Wendling · 13 years ago
  70. 3e944e3 Some more refactoring. by Bill Wendling · 13 years ago
  71. 029e9388 Add a Create method that accepts 'kind' and 'pcadj' arguments. by Bill Wendling · 13 years ago
  72. f2b76aa Refactoring: Separate out the ARM constant pool Constant from the ARM constant by Bill Wendling · 13 years ago
  73. 5249041 Attempt to fix dynamic stack realignment for thumb1 functions. It is in fact by Chad Rosier · 13 years ago
  74. b2ab2fa Inlining and unrolling heuristics should be aware of free truncs. by Andrew Trick · 13 years ago
  75. 5c65541 whitespace by Andrew Trick · 13 years ago
  76. 0bcd9c7 Add Windows x64 stack walking support. Patch by Aaron Ballman! by Michael J. Spencer · 13 years ago
  77. e09b2a0 When inferring the pointer alignment, if the global doesn't have an initializer by Bill Wendling · 13 years ago
  78. 8de3400 Promote comment to doxycomment. Adjust whitespace. No functionality change. by Nick Lewycky · 13 years ago
  79. c8e2bb6 Store sub-class lists as a bit vector. by Jakob Stoklund Olesen · 13 years ago
  80. e27e1ca Move getCommonSubClass() into TRI. by Jakob Stoklund Olesen · 13 years ago
  81. f391e9f Correct for my over-eager delete finger. by Jim Grosbach · 13 years ago
  82. 291512f Add definition of MipsELFObjectWriter. by Akira Hatanaka · 13 years ago
  83. 09a2e0f Register the MC object streamer. by Akira Hatanaka · 13 years ago
  84. 4b6ee7a Register Asm backend. Add functions to MipsAsmBackend. by Akira Hatanaka · 13 years ago
  85. 82ea731 Add MCELFObjectTargetWriter and MCAsmBackend classes. by Akira Hatanaka · 13 years ago
  86. 310c9ea Update CMake build. by Benjamin Kramer · 13 years ago
  87. 4520a10 Initial implementation of MipsMCCodeEmitter. by Akira Hatanaka · 13 years ago
  88. 68e05fb Don't modify constant in-place. by Jim Grosbach · 13 years ago
  89. 62e0590 Tracing or debug-printing a newly formed instruction should not crash. by Andrew Trick · 13 years ago
  90. 18801ec whitespace by Andrew Trick · 13 years ago
  91. c7bafe9 Add definitions of Mips64 rotate instructions. by Akira Hatanaka · 13 years ago
  92. cbf676b float comparison to double 'zero' constant can just be a float 'zero.' by Jim Grosbach · 13 years ago
  93. d98f838 Constify 'isLSDA' and move a method out-of-line. by Bill Wendling · 13 years ago
  94. 0cc4a95 Tidy up. Trailing whitespace. by Jim Grosbach · 13 years ago
  95. 6f09fcf ARM Darwin default relocation model is PIC. by Jim Grosbach · 13 years ago
  96. a64556f isCommutable should be 0 for DSUBu. by Akira Hatanaka · 13 years ago
  97. 98602ac ARM Fixup valus for movt/movw are for the whole value. by Jim Grosbach · 13 years ago
  98. 7850dd0 Fix a bug in compare_numeric(). by Jakob Stoklund Olesen · 13 years ago
  99. 0ba3c0a MCJIT initialization TargetData by Danil Malyshev · 13 years ago
  100. f51b7e5 PTX: Various stylistic and code readability changes recommended by Jim Grosbach. by Justin Holewinski · 13 years ago