1. e6f3203 Add code size to target instruction use it as the 3rd isel sorting tie-breaker. by Evan Cheng · 18 years ago
  2. ffd4364 Added a Flags field to TargetOperandInfo. Currently the only flag is by Evan Cheng · 18 years ago
  3. 0cfd73a Remove CalleeSavedRegisters from class Target. by Evan Cheng · 18 years ago
  4. c01d497 Remove PointerType from class Target by Evan Cheng · 18 years ago
  5. e438c2a Replace "../whatever.td" with "whatever.td", so that out-of-tree backends by Vladimir Prus · 18 years ago
  6. 94ae9d3 Improve comment, patch provided by Vladimir Prus! by Chris Lattner · 18 years ago
  7. 506efda Update comment. by Chris Lattner · 18 years ago
  8. de321a8 Put PHI/INLINEASM into the correct namespace. by Chris Lattner · 18 years ago
  9. f5e1dc2 Renamed AddedCost to AddedComplexity. by Evan Cheng · 18 years ago
  10. 5941320 Allow "let AddedCost = n in" to increase pattern complexity. by Evan Cheng · 18 years ago
  11. 8da17b2 Add support for dwarf register numbering. by Jim Laskey · 19 years ago
  12. da10f19 Shuffle some includes around by Chris Lattner · 19 years ago
  13. a8309ae Split the valuetypes out of Target.td into ValueTypes.td by Chris Lattner · 19 years ago
  14. f338dd8 New type v2f32. by Evan Cheng · 19 years ago
  15. aea20f5 Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit by Evan Cheng · 19 years ago
  16. 19c9550 Subtarget feature can now set any variable to any value by Evan Cheng · 19 years ago
  17. cedc6f4 PHI and INLINEASM are now built-in instructions provided by Target.td by Chris Lattner · 19 years ago
  18. 6da8d99 New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace by Evan Cheng · 19 years ago
  19. 2b4ea79 Added field noResults to Instruction. by Evan Cheng · 19 years ago
  20. 171049d * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. by Evan Cheng · 19 years ago
  21. 58e84a6 Added support to specify predicates. by Evan Cheng · 19 years ago
  22. f8ac814 * Added instruction property hasCtrlDep for those which r/w control-flow by Evan Cheng · 19 years ago
  23. 6510b22 Support multiple ValueTypes per RegisterClass, needed for upcoming vector by Nate Begeman · 19 years ago
  24. 6a64861 Add the majority of the vector machien value types we expect to support, by Nate Begeman · 19 years ago
  25. eedf3b5 refix typo by Chris Lattner · 19 years ago
  26. 46ec786 revert my change for the time being, which broke the build by Chris Lattner · 19 years ago
  27. 0ba7d71 fix a typo :) by Chris Lattner · 19 years ago
  28. be7a2ff Capture more operand info, patch by Evan Cheng by Chris Lattner · 19 years ago
  29. 69a2cf4 Also add the new vector value type here, for completeness. by Nate Begeman · 19 years ago
  30. f0c2be4 Add attribute name and type to SubtargetFeatures. by Jim Laskey · 19 years ago
  31. f5fc2cb Plugin new subtarget backend into the build. by Jim Laskey · 19 years ago
  32. 5384214 Added InstrSchedClass to each of the PowerPC Instructions. by Jim Laskey · 19 years ago
  33. 0de8796 Push processor descriptions to the top of target and add command line info. by Jim Laskey · 19 years ago
  34. 17f2cf0 Pull DAG ISel generation nodes out of the PowerPC backend to where they by Chris Lattner · 19 years ago
  35. ccc8ed7 Add a forward def by Chris Lattner · 19 years ago
  36. ef242b1 Now that self referential classes are supported, get rid of a work-around. by Chris Lattner · 19 years ago
  37. e3cbf82 spell this right by Chris Lattner · 19 years ago
  38. 0efa0f9 Add a flag by Chris Lattner · 19 years ago
  39. a64d4cd add an enum value by Chris Lattner · 19 years ago
  40. ecbce61 Split RegisterClass 'Methods' into MethodProtos and MethodBodies by Chris Lattner · 19 years ago
  41. 1ff9540 Require that targets specify a namespace for their register classes. by Chris Lattner · 19 years ago
  42. 329cdc3 Add a new flag by Chris Lattner · 19 years ago
  43. 273f228 Add some bits that can be set for instructions. by Chris Lattner · 20 years ago
  44. 99ee67a Add isLittleEndianEncoding to InstrInfo class, defaults to `off' by Misha Brukman · 20 years ago
  45. 0fa2066 Add initial support for variants by Chris Lattner · 20 years ago
  46. 8d5c503 Add support for the isLoad and isStore flags, needed by the instruction scheduler by Nate Begeman · 20 years ago
  47. 7baaf09 Capture delay slot info by Chris Lattner · 20 years ago
  48. b228657 Revamp the Register class, and allow the use of the RegisterGroup class to by Chris Lattner · 20 years ago
  49. b4d83c1 Add two values by Chris Lattner · 20 years ago
  50. dd43e34 isdummyclass goes away by Chris Lattner · 20 years ago
  51. 9222cde disable all of the pattern isel stuff by Chris Lattner · 20 years ago
  52. fa14683 Add i1imm by Chris Lattner · 20 years ago
  53. 175580c Make the AsmWriter a first-class tblgen object. Allow targets to specify by Chris Lattner · 20 years ago
  54. 52d2f14 Fill out immediate operand classes, add a new Operand class by Chris Lattner · 20 years ago
  55. 8124020 Remove ClassPrefix variable as it's no longer used. by Misha Brukman · 20 years ago
  56. 665235b Classes need to have a prefix name, so that they can be tacked on to the pieces by Misha Brukman · 20 years ago
  57. 33c23dd Add some immediate forms, make name optional by Chris Lattner · 20 years ago
  58. c139203 Add the 'ops' marker, add an AsmString initializer by Chris Lattner · 20 years ago
  59. bbe664c Move the 'Expander' node to later in the file, with the other experimental by Chris Lattner · 20 years ago
  60. 2a809f6 New flag by Chris Lattner · 20 years ago
  61. 6565043 Expose the "Other" value type to tablegen targets by Chris Lattner · 21 years ago
  62. 856ba76 Added LLVM copyright header. by John Criswell · 21 years ago
  63. b6ef5c8 Add a bunch of new node types, including a new Void dummy register class by Chris Lattner · 21 years ago
  64. c12a614 Rename DNVT_bool to DNVT_i1 to be consistent with type system by Chris Lattner · 21 years ago
  65. c847796 Add support for basicblocks, setCC instructions, and branches by Chris Lattner · 21 years ago
  66. c0bb13d add frameidx support by Chris Lattner · 21 years ago
  67. 7c2af6e Remove dead code by Chris Lattner · 21 years ago
  68. 622003f add support for more nodes by Chris Lattner · 21 years ago
  69. f8dfa6f Make imm be a leaf instead of a nonterminal by Chris Lattner · 21 years ago
  70. ec4f523 Update tablegen interfaces by Chris Lattner · 21 years ago
  71. 3e77d6e Start adding usefulness to the DAG node definitions, add a new Expander class by Chris Lattner · 21 years ago
  72. 244883e Allow instructions to have a DAG pattern associated with them. by Chris Lattner · 21 years ago
  73. 17d4d14 There is nothing special about noops now by Chris Lattner · 21 years ago
  74. 60e81db Transition to using let instead of set by Chris Lattner · 21 years ago
  75. 76bf868 Allow specifying custom names for registers by Chris Lattner · 21 years ago
  76. 34a2068 Rearrange fields yet again: Don't instantiate these lists ONCE PER INSTRUCTION. by Chris Lattner · 21 years ago
  77. a5100d9 Remove the RegisterInfo class in favor of a general Target class. Add instrinfo stuff by Chris Lattner · 21 years ago
  78. be84e3c Rename fields by Chris Lattner · 21 years ago
  79. de04dd7 encode size information into each ValueType Add new RegisterInfo class by Chris Lattner · 21 years ago
  80. 0ad1361 Add comments by Chris Lattner · 21 years ago
  81. 7c28952 Add all of the necessary classes to describe the contents of the MRegister.h implementation by Chris Lattner · 21 years ago
  82. ee6b5f6 No this file is not actually Sparc.td :) by Chris Lattner · 21 years ago
  83. 84c40c1 Add namespace specifier, add flags used by the X86 BE by Chris Lattner · 21 years ago
  84. b3aa319 Instead of specifying the SIZE of the register, go so far as to specify by Chris Lattner · 21 years ago
  85. 01c1638 Added the target-independent part of TableGen data. by Misha Brukman · 21 years ago