Gitiles
Code Review Sign In
gerrit-public.fairphone.software / platform / external / llvm / 79949597b281f0fd757bc11178e39887d0ba9735 / utils
  1. 7994959 Simplify the SmallVector pretty printer for LLDB a bit and make it work with reference types. by Benjamin Kramer · 12 years ago
  2. f1adbfe Fix issue with invalid flat operand number by Evandro Menezes · 12 years ago
  3. f1bb421 Fix issue with invalid flat operand number by Evandro Menezes · 12 years ago
  4. be02a90 Add support of RTM from TSX extension by Michael Liao · 12 years ago
  5. 322ff88 Fix a build problem with xlc. The error message was by Rafael Espindola · 12 years ago
  6. ad0b3b2 Generate a table-driven version of TRI::composeSubRegIndices(). by Jakob Stoklund Olesen · 12 years ago
  7. 50a6102 Don't return false when the function's return type is a pointer. by Kaelyn Uhrain · 12 years ago
  8. 61131ab Remove exception handling usage from tblgen. by Joerg Sonnenberger · 12 years ago
  9. a8a0a15 Remove unused member & unnecessary semicolon. by David Blaikie · 12 years ago
  10. 0b031cb llvm/utils/TableGen/CMakeLists.txt: Update corresponding to r166685. by NAKAMURA Takumi · 12 years ago
  11. becdf4d add TableGen support to create relationship maps between instructions by Sebastian Pop · 12 years ago
  12. 2c6d713 Don't use stack unwinding to provide the location information for by Joerg Sonnenberger · 12 years ago
  13. 6448673 Allow the commuted form of tied-operand constraints in tablegen ("$dst = $src", by Lang Hames · 12 years ago
  14. 6b283ea lit: Rename the valgrind leaks feature to match what is currently used by Daniel Dunbar · 12 years ago
  15. f793fbc lit: Remove support for XTARGET. by Daniel Dunbar · 12 years ago
  16. f854597 lit: Add 'valgrind' and 'valgrind-leaks' features when valgrind is used. by Daniel Dunbar · 12 years ago
  17. 7badf45 lit: Propagate TERM variable in environment, some tools can do really obscure by Daniel Dunbar · 12 years ago
  18. 44a83f0 lit: Allow XFAIL: lines to also refer to "features". by Daniel Dunbar · 12 years ago
  19. 07aae2e Add an enum for the return and function indexes into the AttrListPtr object. This gets rid of some magic numbers. by Bill Wendling · 12 years ago
  20. cb3de0b Attributes Rewrite by Bill Wendling · 12 years ago
  21. 6e006d3 [ms-inline asm] Use the new API introduced in r165830 in lieu of the by Chad Rosier · 12 years ago
  22. 5628920 Change (!list.size() == 0) to (!list.empty()). No functional change. by Richard Trieu · 12 years ago
  23. ed84062 Remove unnecessary classof()'s by Sean Silva · 12 years ago
  24. fcb5e95 Remove extra semicolons. by Chad Rosier · 12 years ago
  25. fff8287 tblgen: Compile TableGen without RTTI. by Sean Silva · 12 years ago
  26. 8b43dbf tblgen: Move mini Type hierarchy to LLVM-style RTTI. by Sean Silva · 12 years ago
  27. 3f7b7f8 tblgen: Use semantically correct RTTI functions. by Sean Silva · 12 years ago
  28. 6cfc806 tblgen: Mechanically move dynamic_cast<> to dyn_cast<>. by Sean Silva · 12 years ago
  29. 11d0042 Pass into the AttributeWithIndex::get method an ArrayRef of attribute by Bill Wendling · 12 years ago
  30. dbe6d43 TableGen subtarget emitter cleanup. by Andrew Trick · 12 years ago
  31. 6312cb0 misched: Generate IsBuffered flag for machine resources. by Andrew Trick · 12 years ago
  32. 791cfc2 Move TargetData to DataLayout. by Micah Villmow · 12 years ago
  33. 9ba9d4d [ms-inline asm] Add a few typedefs to simplify future changes. by Chad Rosier · 12 years ago
  34. 736ceac tblgen: Replace uses of dynamic_cast<XXXRecTy> with dyn_cast<>. by Sean Silva · 12 years ago
  35. 1374526 Added instregex support to TableGen subtarget emitter. by Andrew Trick · 12 years ago
  36. 2062b12 TableGen subtarget emitter, nearly first class support for SchedAlias. by Andrew Trick · 12 years ago
  37. fe05d98 Cleanup TableGen subtarget emitter. by Andrew Trick · 12 years ago
  38. d494a3b [ms-inline asm] Default to the 'm' constraint. This matches the behavior of the by Chad Rosier · 12 years ago
  39. 9e21138 tblgen: Migrate llvm-tblgen to new TableGenMain API. by Sean Silva · 12 years ago
  40. c69bb70 Fix 80-column violations. Cleanup whitespace in generated code. by Chad Rosier · 12 years ago
  41. 2268587 [ms-inline asm] Add the convertToMapAndConstraints() function that is used to by Chad Rosier · 12 years ago
  42. 94c2271 Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767 by Sylvestre Ledru · 12 years ago
  43. 7e2c793 Fix a typo 'iff' => 'if' by Sylvestre Ledru · 12 years ago
  44. 2590c2e Rather then have a wrapper function, have tblgen instantiate the implementation. by Chad Rosier · 12 years ago
  45. 00796a1 Rather then have a wrapper function, have tblgen instantiate the implementation. by Chad Rosier · 12 years ago
  46. 9264988 Machine Model (-schedmodel only). Added SchedAliases. by Andrew Trick · 12 years ago
  47. d717a06 [ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser. by Chad Rosier · 12 years ago
  48. 6018944 Whitespace. by Chad Rosier · 12 years ago
  49. 9d227af Clarify comment. by Dmitri Gribenko · 12 years ago
  50. 3e9b6db Add in new data types that are used by AMDIL/ANL among others. by Micah Villmow · 12 years ago
  51. eb79b54 Soften the pattern-can-never-match error in TableGen into a warning. This pattern can be very useful in cases where you want to define a multiclass that covers both commutative and non-commutative operators (say, add and sub). by Owen Anderson · 12 years ago
  52. 8a312fb Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L. by Craig Topper · 12 years ago
  53. 3b8fb64 SchedMachineModel: compress the CPU's WriteLatencyTable. by Andrew Trick · 12 years ago
  54. b2df610 Iterate deterministicaly over ClassInfo*'s by Sean Silva · 12 years ago
  55. decfdf5 Iterate deterministically over register classes by Sean Silva · 12 years ago
  56. 90fee07 Refactor Record* by-ID comparator to Record.h by Sean Silva · 12 years ago
  57. 30ce40e FileCheck: Fix off-by-one bug that made CHECK-NOT: ignore the next character after the colon. by Benjamin Kramer · 12 years ago
  58. 3a36444 Make custom operand parsing mnemonic indices use the same mnemonic table as the match table. Reorder fields in OperandMatchEntry to provide the least amount of padding for in tree targets. by Craig Topper · 12 years ago
  59. fee7f01 Use variable type for index into mnemonic table. Shrinks size of index field on in tree targets. Saving static data space. by Craig Topper · 12 years ago
  60. 34aadd6 Replaced ReInitMCSubtargetInfo with InitMCProcessor. by Andrew Trick · 12 years ago
  61. e076bb1 comment typo by Andrew Trick · 12 years ago
  62. e3dbc98 TableGen subtarget emitter. Use getSchedClassIdx. by Andrew Trick · 12 years ago
  63. 4d2d1c4 TableGen subtarget emitter. Generate resolveSchedClass generated hook for resolving instruction variants. by Andrew Trick · 12 years ago
  64. ee290ba TableGen subtarget emitter. Remove unnecessary header dependence. by Andrew Trick · 12 years ago
  65. e127dfd TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model. by Andrew Trick · 12 years ago
  66. b198f5c Mark asm matcher conversion table as const. by Craig Topper · 12 years ago
  67. be480ff Fix typo in comment. No functional change. by Craig Topper · 12 years ago
  68. e4095f9 Backout the wrong subtarget emitter fix by Andrew Trick · 12 years ago
  69. f23ddf5 Fix release build after reverting by Andrew Trick · 12 years ago
  70. e1b5328 Revert r164061-r164067. Most of the new subtarget emitter. by Andrew Trick · 12 years ago
  71. a2a47d1 InitMCProcessor by Andrew Trick · 12 years ago
  72. 5d94082 comment typo by Andrew Trick · 12 years ago
  73. 41be51b TableGen subtarget emitter. Use getSchedClassIdx. by Andrew Trick · 12 years ago
  74. 021ba26 TableGen subtarget emitter. Generate resolveSchedClass generated hook for resolving instruction variants. by Andrew Trick · 12 years ago
  75. db7afac TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model. by Andrew Trick · 12 years ago
  76. 544c880 TableGen subtarget emitter. Format and emit data tables for the new machine model. by Andrew Trick · 12 years ago
  77. 52c3a1d TableGen subtarget emitter. Generate data tables for the new machine model. by Andrew Trick · 12 years ago
  78. 40096d2 TableGen subtarget emitter. Emit processor resources for the new machine model. by Andrew Trick · 12 years ago
  79. bc4ff6e TableGen subtarget parser: Add getProcResourcesIdx(). by Andrew Trick · 12 years ago
  80. 9bb938c TableGen: Add initializer. by Jim Grosbach · 12 years ago
  81. 3780ad8 Fix a few vars that can end up being used without initialization. by Axel Naumann · 12 years ago
  82. efd841c Fix typo by Michael Liao · 12 years ago
  83. af8d66c Add 'virtual' keywoards to output file for overridden functions. by Craig Topper · 12 years ago
  84. ef2340e Add 'virtual' keywoards to output file for overridden functions. by Craig Topper · 12 years ago
  85. 4e0ae44 Fix Doxygen issues: wrap code examples in \code and use \p to refer to by Dmitri Gribenko · 12 years ago
  86. 5974c31 Revert r163878 as it breaks on targets with alternate register names. Such targets do not exist in the main tree so this was not noticed. by Craig Topper · 12 years ago
  87. 3cbd178 TableGen subtarget parser. Handle new machine model. by Andrew Trick · 12 years ago
  88. 5e613c2 TableGen subtarget parser. Handle new machine model. by Andrew Trick · 12 years ago
  89. 48605c3 TableGen subtarget parser. Handle new machine model. by Andrew Trick · 12 years ago
  90. f4d7824 Allow the second opcode info table to be 8, 16, or 32-bits as needed to represent additional fragments. This recovers some space on ATT X86 syntax and PowerPC which only need 40-bits instead of 48-bits. This also increases ARM to 64-bits to fully encode all of its operands. by Craig Topper · 12 years ago
  91. 4e5babe Reduce size of register name index tables by using uint16_t for all in tree targets. If more than 16-bits are needed for any out of tree targets, code will detect and use uint32_t instead. by Craig Topper · 12 years ago
  92. 785a41d AsmWriterEmitter: OpInfo2 should be unsigned 16-bit. by Manman Ren · 12 years ago
  93. 6579cf8 AsmWriterEmitter: increase the number of bits for OpcodeInfo from 32-bit to by Manman Ren · 12 years ago
  94. 2d9eb72 Fix Doxygen issues: by Dmitri Gribenko · 12 years ago
  95. 76b29b5 Add a new compression type to ModRM table that detects when the memory modRM byte represent 8 instructions and the reg modRM byte represents up to 64 instructions. Reduces modRM table from 43k entreis to 25k entries. Based on a patch from Manman Ren. by Craig Topper · 12 years ago
  96. a562dc7 TableGen: Convert an assert() to a proper diagnostic. by Jim Grosbach · 12 years ago
  97. 67c8978 Fix a couple of Doxygen comment issues pointed out by -Wdocumentation. by Dmitri Gribenko · 12 years ago
  98. 83c0eef Improve tblgen code cleanliness: create an unknown_class, from which the unknown def inherits. Make tblgen check for that class, rather than checking for the def itself. by Owen Anderson · 12 years ago
  99. d2c6997 Compute a map from register names to registers, rather than scanning the list of registers every time we want to look up a register by name. by Owen Anderson · 12 years ago
  100. a603577 Add TRI::getSubRegIndexLaneMask(). by Jakob Stoklund Olesen · 12 years ago