- 8da43bf OCaml bindings: add icmp_predicate by Torok Edwin · 13 years ago
- 2c4ae18 OCaml bindings: fix infinite recursion on string_of_lltype by Torok Edwin · 13 years ago
- 6b228e5 bindings: named struct support by Torok Edwin · 13 years ago
- 4c4b71c ocaml bindings: add findlib META support by Torok Edwin · 13 years ago
- 3dd1674 ocaml bindings: introduce classify_value by Torok Edwin · 13 years ago
- 6563c87 ocaml bindings: add getopcode for constant and instruction, and int64_of_const. by Torok Edwin · 13 years ago
- 3111641 bindings: tab and indentation fixes of my previous commits by Torok Edwin · 13 years ago
- b10946a A few 80-col violations. by Evan Cheng · 13 years ago
- 5d6a673 Disable code/data region symbols on ELF targets, where different mapping symbols are used for ARM/Thumb mode code. This should only be re-enabled once we have a solution to properly distinguish these. by Owen Anderson · 13 years ago
- d712f93 Add an implementation of the CanLowerReturn function to the PPC backend by Hal Finkel · 13 years ago
- 1ce2668 Add f128 to datalayout string. by Akira Hatanaka · 13 years ago
- bc5c49b Fix threads/jobs Calculation by David Greene · 13 years ago
- 8e20b94 Add Helpful Messages by David Greene · 13 years ago
- cdc3fbc Add Option to Skip Install by David Greene · 13 years ago
- d17f813 Add Option to Skip gcc Build by David Greene · 13 years ago
- 8ee53e2 initial test commit (remove whitespace) by Hal Finkel · 13 years ago
- ac7caa0 Update live-in lists when splitting critical edges. by Jakob Stoklund Olesen · 13 years ago
- 008b58c Revert r141932, r141936 and r141937. by Akira Hatanaka · 13 years ago
- 312b7c9 Fix typo. "__sync_fetch_and-xor_4" should be "__sync_fetch_and_xor_4". by Jim Grosbach · 13 years ago
- 4c7f1ca An instruction's operands aren't necessarily instructions or constants. They by Nick Lewycky · 13 years ago
- 54a1117 Add X86 ANDN instruction. Including instruction selection. by Craig Topper · 13 years ago
- 909652f Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 processor which is gcc's name for Haswell. by Craig Topper · 13 years ago
- 91d2cc9 Definition of function getMipsRegisterNumbering. by Akira Hatanaka · 13 years ago
- 2891662 Add definition of class MipsELFWriterInfo. by Akira Hatanaka · 13 years ago
- 51f72c5 Add missing relocation types. by Akira Hatanaka · 13 years ago
- 88c1103 Add ELF relocation types for Mips. by Akira Hatanaka · 13 years ago
- 36004b9 Fixup enumerations. by Akira Hatanaka · 13 years ago
- 93d2a0a Add more Mips relocation types. by Akira Hatanaka · 13 years ago
- ccbe603 Ban rematerializable instructions with side effects. by Jakob Stoklund Olesen · 13 years ago
- 0a951fb V_SET0 has no side effects. by Jakob Stoklund Olesen · 13 years ago
- a80444f Add value numbers when spilling dead defs. by Jakob Stoklund Olesen · 13 years ago
- dae36ba Avoid undefined behavior in negation in LSR. Patch by Ahmed Charles. by Eli Friedman · 13 years ago
- ecb830e Fix undefined shift. Patch by Ahmed Charles. by Eli Friedman · 13 years ago
- d83a54f Simplify assertion, and avoid undefined shift. Based on patch by Ahmed Charles. by Eli Friedman · 13 years ago
- 2dd0cfe Support/Windows: Add support modifying memory permissions on Windows. Patch by Aaron Ballman! by Michael J. Spencer · 13 years ago
- 5bd7ff2 Fix undefined shifts and abs in Alpha backend. Based on patch by Ahmed Charles. by Eli Friedman · 13 years ago
- 7d2bc08 Support/Windows: Add efficent RW mutex on Windows. Patch by Aaron Ballman! by Michael J. Spencer · 13 years ago
- 87d5cb8 Fixed typo. by Lang Hames · 13 years ago
- 90406e1 Avoid undefined behavior in signed integer negation. Patch by Ahmed Charles. by Eli Friedman · 13 years ago
- 8e4d042 Simplify and avoid undefined shift. Based on patch by Ahmed Charles. by Eli Friedman · 13 years ago
- 63b2f8c ELF: Fix the section that relocations apply to. Add test to verify. Patch by Danil Malyshev! by Michael J. Spencer · 13 years ago
- 942eb00 llvm-object: Add inline relocation information to disassembly. by Michael J. Spencer · 13 years ago
- b414142 Enhance the memdep interface so that users can tell the difference between a dependency which cannot be calculated and a path reaching the entry point of the function. This patch introduces isNonFuncLocal, which replaces isUnknown in some cases. by Eli Friedman · 13 years ago
- 48ba0e4 Reapply r141870, SCEV expansion of post-inc. by Andrew Trick · 13 years ago
- fe28ef4 Don't forget to reconstruct D after changing the scope that we're looking at. by Eric Christopher · 13 years ago
- a4d326d Update IntrinsicsXCore.td with the normal LLVM notice at the top of the file. by Richard Osborne · 13 years ago
- 14a5f46 llvm-objdump: Fix whitespace. by Michael J. Spencer · 13 years ago
- 178dbd4 llvm-objdump: Fix dumping of multiple symbols with the same address. by Michael J. Spencer · 13 years ago
- bff6f86 COFF: Implement sectionContainsSymbol for relocatable files only. by Michael J. Spencer · 13 years ago
- 7f1653a Fix memory corruption I introduced a few checkins ago. by Andrew Trick · 13 years ago
- e9d3c1c configure: [cygming] Set --disable-embed-stdcxx by default on --enable-shared. by NAKAMURA Takumi · 13 years ago
- c18e940 SETEND is not allowed in an IT block. by Owen Anderson · 13 years ago
- 753e02a Revert r141870. The test case crashes on linux with data corruption. A deeper issue was exposed. by Andrew Trick · 13 years ago
- e0af2ad docs/CMake.html: Clarify LLVM_LIT_TOOLS_DIR as :PATH. by NAKAMURA Takumi · 13 years ago
- c8f6c44 Fix incorrect ELF typedefs. by Michael J. Spencer · 13 years ago
- b001759 LSR: Reuse the post-inc expansion of expressions. by Andrew Trick · 13 years ago
- 5d332f8 build: Remove some stray LLVMC configure variables. by Daniel Dunbar · 13 years ago
- 94f01db SCEV: Rewrite TrandformForPostIncUse to handle expression DAGs, not by Andrew Trick · 13 years ago
- ce1823c Slightly more useful tracing. by Andrew Trick · 13 years ago
- d38e99e Force CPU type on test so it doesn't accidentally emit movbe instead of bswap on Intel Atom CPUs. by Benjamin Kramer · 13 years ago
- 898f336 Mark 'branch indirect' instruction as an indirect branch. by Kalle Raiskila · 13 years ago
- 4e68054 More closely follow libgcc, which has code after the `ret' instruction to by Bill Wendling · 13 years ago
- 1203fe7 Revert r141854 because it was causing failures: by Bill Wendling · 13 years ago
- 82222c2 Should not add instructions to a BB after a return instruction. The machine instruction verifier doesn't like this, nor do I. by Bill Wendling · 13 years ago
- 326e491 Use an existing method. by Cameron Zwarich · 13 years ago
- 8ab1d1e Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 processor which is gcc's name for Haswell. by Craig Topper · 13 years ago
- d501c71 Add 'implicit EFLAGS' to patterns for popcnt and lzcnt by Craig Topper · 13 years ago
- f77dea1 Elf_Word is not POD! Stop using it in a DenseMap. by Nick Lewycky · 13 years ago
- dec1b10 If MI is deleted then remove it from the set. If a new MI is created, it could by Nick Lewycky · 13 years ago
- ea3abd5 Tabs to spaces. by Nick Lewycky · 13 years ago
- 3821b18 Add missing braces to pacify GCC's -Wparentheses. by Nick Lewycky · 13 years ago
- fc61a23 Add missing ELF constants. by Michael J. Spencer · 13 years ago
- dee83c9 Also inflate register classes around inline asm. by Jakob Stoklund Olesen · 13 years ago
- f591697 Add MachineInstr::getRegClassConstraint(). by Jakob Stoklund Olesen · 13 years ago
- 9dfaacb Extract a method for finding the inline asm flag operand. by Jakob Stoklund Olesen · 13 years ago
- 459b74b Encode register class constreaints in inline asm instructions. by Jakob Stoklund Olesen · 13 years ago
- a3a1635 Attempt to fix MSVC build. by Eli Friedman · 13 years ago
- f6fb7ed We need to verify that the machine instruction we're using as a replacement for by Bill Wendling · 13 years ago
- 5c75af6 Use a utility from MathExtras to clarify a check and avoid undefined behavior. Based on patch by Ahmed Charles. by Eli Friedman · 13 years ago
- 95f8db4 The VMAs stored in the symbol table of a MachO file are absolute addresses, not offsets from the section. by Owen Anderson · 13 years ago
- a046d2f Use unsigned multiply to hash integers, so we don't end up with undefined behavior for large signed integers. Based on patch by Ahmed Charles. by Eli Friedman · 13 years ago
- 68df750 Removed colons from some target datalayout strings in test, since they don't match the required format. by Lang Hames · 13 years ago
- 10a8c62 Don't label a STAB debugging symbol as a function symbol. by Owen Anderson · 13 years ago
- cd74988 sectionContainsSymbol needs to be based on VMA's rather than section indices to properly account for files with segment load commands that contain no sections. by Owen Anderson · 13 years ago
- 18ead6b Fix a couple hash functions so that they do not depend on undefined shifts. Based on patch by Ahmed Charles. by Eli Friedman · 13 years ago
- 81b2928 ARM addrmode5 represents the 'U' bit of the encoding backwards. by Jim Grosbach · 13 years ago
- 90196fc Fix APFloat::getSmallestNormalized so the shift doesn't depend on undefined behavior. Patch from Ahmed Charles. by Eli Friedman · 13 years ago
- 7247a5f Fix APFloat::getLargest so that it actually returns the correct value. Found by accident while reviewing a patch to nearby code. by Eli Friedman · 13 years ago
- 4124294 Section indices in MachO symbol tables begin at 1, not 0. by Owen Anderson · 13 years ago
- acbaecd Finish supporting cpp #file/line comments in assembler for error messages. So by Kevin Enderby · 13 years ago
- 7007e4c Disable machine LICM speculation check (for profitability) until I have time to investigate the regressions. by Evan Cheng · 13 years ago
- 980df16 To find the exiting VN of a LiveInterval from a block, use the previous slot by Cameron Zwarich · 13 years ago
- c66e7af Thumb2 assembly parsing and encoding for LDC/STC. by Jim Grosbach · 13 years ago
- 18ad76b Hoist vector.size() computation out of the loop. No functionality change. by Nick Lewycky · 13 years ago
- b0786b3 addrmode2 is gone from these, so no need for the reg0 operand. by Jim Grosbach · 13 years ago
- 9f45754 ARM encoding tests for STC. by Jim Grosbach · 13 years ago
- 9b8f2a0 ARM parsing and encoding for the <option> form of LDC/STC instructions. by Jim Grosbach · 13 years ago
- 01208d5 80 columns. by Jim Grosbach · 13 years ago
- bc9c802 Tidy up. Formatting. by Jim Grosbach · 13 years ago
- 9e15d65 Fix a thinko that Nick noticed. The previous code actually worked as by Dan Gohman · 13 years ago