1. 8dae138 Fix WriteAsOperand to not emit a leading space character. Adjust by Dan Gohman · 16 years ago
  2. e009180 adjust last patch per review feedback by Dale Johannesen · 16 years ago
  3. bfe2f40 minor correction by Gabor Greif · 16 years ago
  4. 014278e Remove isImm(), isReg(), and friends, in favor of by Dan Gohman · 16 years ago
  5. b8ca4ff Fix PR2792: treat volatile loads as writing memory somewhere. by Duncan Sands · 16 years ago
  6. 2aa0e64 Fix random abort. by Evan Cheng · 16 years ago
  7. 095cc29 Define CallSDNode, an SDNode subclass for use with ISD::CALL. by Dan Gohman · 16 years ago
  8. e7de7e3 Typo. by Evan Cheng · 16 years ago
  9. be3034c Rely on instruction format to determine so_reg operand for now. by Evan Cheng · 16 years ago
  10. 05fc966 Revert 56176. All those instruction formats are still needed. by Evan Cheng · 16 years ago
  11. 55375a4 Accidentially flipped the condition. by Evan Cheng · 16 years ago
  12. 42d5ee06 Add debug dumps. by Evan Cheng · 16 years ago
  13. a964b7d Eliminate unnecessary instruction formats. by Evan Cheng · 16 years ago
  14. 49a9f29 Addrmode 1 S bit can be dynamically set. Look for CPSR def. by Evan Cheng · 16 years ago
  15. 5f1db7b Rewrite address mode 1 code emission routines. by Evan Cheng · 16 years ago
  16. 0b23ac1 The "alias" keyword comes first. by Duncan Sands · 16 years ago
  17. ee9e1b0 On some targets, non-move instructions can become move instructions because of coalescing. e.g. by Evan Cheng · 16 years ago
  18. 4fbd796 Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and by Dan Gohman · 16 years ago
  19. 913d3df Pass "earlyclobber" bit through to machine by Dale Johannesen · 16 years ago
  20. f5aeb1a Rename ConstantSDNode::getValue to getZExtValue, for consistency by Dan Gohman · 16 years ago
  21. 0e3b7b2 Give GlobalsModRef a whirl in the nightly testers. by Duncan Sands · 16 years ago
  22. 2bb4a4d Rather than marking all internal globals "Ref" by Duncan Sands · 16 years ago
  23. e2f2083 The sequence for ppcf128 compares was not IEEE safe in the presence of NaNs. by Dale Johannesen · 16 years ago
  24. 4f833d4 On 64-bit targets, change 32-bit getelementptr indices to be 64-bit by Dan Gohman · 16 years ago
  25. 3139ff8 Fix a vectorshuffle instcombine bug introduced by r55995. by Dan Gohman · 16 years ago
  26. 363f53f Add indirect tail call (function pointer) examples. by Arnold Schwaighofer · 16 years ago
  27. e5d20f9 udpate header comment: s/VP/VFP/ by Jim Grosbach · 16 years ago
  28. 1fdc40f When tailcallopt is enabled all fastcc calls must have an aligned argument stack size. Add a test case. by Arnold Schwaighofer · 16 years ago
  29. 8db8668 Fix PR2748. Avoid coalescing physical register with virtual register which would create illegal extract_subreg. e.g. by Evan Cheng · 16 years ago
  30. ac34a00 Fix a bug in ANY_EXTEND handling that was breaking 403.gcc on X86-64 in fast isel. by Owen Anderson · 16 years ago
  31. af8bc26 Fix comment typo. by Duncan Sands · 16 years ago
  32. 892b840 Intrinsics don't touch internal global variables by Duncan Sands · 16 years ago
  33. bcb37fd Fix a copy+paste bug that Duncan spotted. For several by Dan Gohman · 16 years ago
  34. 4086906 Fix PR2783 - coalescer bug. Missing a TargetRegisterInfo::isVirtualRegister check. by Evan Cheng · 16 years ago
  35. ffeecd6 Eliminate some unused methods. by Evan Cheng · 16 years ago
  36. 84a8be3 Indentation. by Evan Cheng · 16 years ago
  37. 7c9a772 lib/Target/SubtargetFeature.cpp asserts that the FeatureKV[] table be sorted by Jim Grosbach · 16 years ago
  38. 1abe60b Intrinsics don't read these kinds of global variables. by Duncan Sands · 16 years ago
  39. dd595c5 Change getSubReg semantics. It now returns zero if the specified register doesn't have a subreg of the specified index. by Evan Cheng · 16 years ago
  40. 3885578 Fix a 80 column violation. by Evan Cheng · 16 years ago
  41. d18a462 The version of AtomicSDNode::AtomicSDNode used (only) for by Dale Johannesen · 16 years ago
  42. b636913 If ISD::ANY_EXTEND fails, try ISD::ZERO_EXTEND and ISD::SIGN_EXTEND before giving up. This fixes 445.gobmk on by Owen Anderson · 16 years ago
  43. 209a409 Succumb utterly to compatibility and implement by Dale Johannesen · 16 years ago
  44. d9c553f Propagate subreg index when promoting a load to a copy. by Evan Cheng · 16 years ago
  45. 7f85fbd In my analysis for r56076 I missed the case where the original by Dan Gohman · 16 years ago
  46. 1df3fd6 Fix an icmp+sdiv optimization to check for and handle an overflow by Dan Gohman · 16 years ago
  47. 8c9c55f Add more documentation advertising the -view-*-dags options. by Dan Gohman · 16 years ago
  48. 78efce6 X86FastISel support for double->float and float->double casts. by Dan Gohman · 16 years ago
  49. 74321ab FastISel support for i1 PHI nodes. by Dan Gohman · 16 years ago
  50. 8211648 FastISel support for i1 constants. by Dan Gohman · 16 years ago
  51. 369e987 Fix a bug in the coalescer where it didn't check if a live interval existed before trying to manipulate it. This by Owen Anderson · 16 years ago
  52. 0586d91 Add X86FastISel support for static allocas, and refences by Dan Gohman · 16 years ago
  53. 014264b Fix PR2664 - spiller GetRegForReload wasn't respecting sub-register indices on machine operands. by Evan Cheng · 16 years ago
  54. b188dd9 Fix a fastcc + sret bug. If fastcc and sret, callee doesn't need to pop the hidden struct ptr; Re-enable fastcc. by Evan Cheng · 16 years ago
  55. fb0e132 Handle new intrinsics with vector arguments. Patch by Paul Redmond. by Dale Johannesen · 16 years ago
  56. 3ee25dc Add a break statement that I accidentally deleted when by Dan Gohman · 16 years ago
  57. 36a5bf8 fix white spaces. by Devang Patel · 16 years ago
  58. bf53c29 Fix name. by Duncan Sands · 16 years ago
  59. 3ed7d37 Add trampoline support for the new FastCC calling by Duncan Sands · 16 years ago
  60. 06d77dd Turn off the new FastCC for the moment. It causes by Duncan Sands · 16 years ago
  61. fc2508e Remove unnecessary bit-wise AND from the limited precision work. by Bill Wendling · 16 years ago
  62. c0c3b9a Fix 80 col violation. by Daniel Dunbar · 16 years ago
  63. cb89309 Fix a warning about comparing signed and unsigned values. by Dan Gohman · 16 years ago
  64. 8ec3389 Fix typo. by Evan Cheng · 16 years ago
  65. 277fc24 Check that both operands are f32 before attempting to lower. by Bill Wendling · 16 years ago
  66. aeb5c7b Implement "visitPow". This is mainly used to see if we have a pow() call of this by Bill Wendling · 16 years ago
  67. 9d24ac5 A few more places where FPOW is being ignored. by Evan Cheng · 16 years ago
  68. 4344a5d Change -fast-isel-no-abort to -fast-isel-abort, which now defaults by Dan Gohman · 16 years ago
  69. 4b88702 Legalizer was missing code that expand fpow to a libcall. by Evan Cheng · 16 years ago
  70. e10c814 Adding 6-, 12-, and 18-bit limited-precision floating-point support for exp2 by Bill Wendling · 16 years ago
  71. d2e51af Move the uglier parts of deciding not to emit a by Dale Johannesen · 16 years ago
  72. b4ec283 Add support for 6-, 12-, and 18-bit limited precision calculations of exp for by Bill Wendling · 16 years ago
  73. 7258737 Fix a minor wording ambiguity in the Developer Policy. by Dan Gohman · 16 years ago
  74. 293d5f8 Add a new option, -fast-isel-verbose, that can be used with by Dan Gohman · 16 years ago
  75. 3ef2d60 Clear preference when it no longer makes sense. by Evan Cheng · 16 years ago
  76. a009d2e Remove. by Devang Patel · 16 years ago
  77. d22a849 if loop induction variable is always sign or zero extended then by Devang Patel · 16 years ago
  78. bd6dc7a Add assertion check. by Devang Patel · 16 years ago
  79. 4b3f08b fix overflow check. by Devang Patel · 16 years ago
  80. 0d95267 Clean this up, based on Evan's suggestions. by Owen Anderson · 16 years ago
  81. 3915025 - Add support for 6-, 12-, and 18-bit limited precision floating-point "log" by Bill Wendling · 16 years ago
  82. 5530216 Fix PR2757. Ignore liveinterval register allocation preference if the preference register is not in the right register class. This can happen due to sub-register coalescing. by Evan Cheng · 16 years ago
  83. 19e861a Make safer variant of alias resolution routine to be default by Anton Korobeynikov · 16 years ago
  84. 7ca9d81 Simplify this some more. No functionality change. by Duncan Sands · 16 years ago
  85. e4c6b61 Resolve aliases, when possible by Anton Korobeynikov · 16 years ago
  86. bd297bc Add limited precision floating-point conversions of log10 for 6- and 18-bit by Bill Wendling · 16 years ago
  87. e3b4c0e Mark IMPLICIT_DEF as being rematerializable and cheap-as-a-move. by Dan Gohman · 16 years ago
  88. 820c83b Fix typo by Anton Korobeynikov · 16 years ago
  89. 832b2a9 Fix incorrect linker behaviour: we shouldn't resolve weak aliases. by Anton Korobeynikov · 16 years ago
  90. bff66b0 Replace explicit pointer-size constants to TargetData query. by Anton Korobeynikov · 16 years ago
  91. 488fbfc Make SimplifyDemandedVectorElts simplify vectors with multiple by Dan Gohman · 16 years ago
  92. 0938f74 Simplify. Fix outdated comment. by Devang Patel · 16 years ago
  93. acd12fc fit in 80 cols, minor tweaks by Gabor Greif · 16 years ago
  94. 24a0521 Optimization suggested by Matthijs Kooijman. by Duncan Sands · 16 years ago
  95. 99c1a7c Correct callgraph construction. It has two problems: by Duncan Sands · 16 years ago
  96. 076055c Update VC++ project files. by Argyrios Kyrtzidis · 16 years ago
  97. baf37cd Check for type legality before materializing integer constants in fast isel. With this change, by Owen Anderson · 16 years ago
  98. 70f684f Allow use of ssh to perform remote execution. by Evan Cheng · 16 years ago
  99. cf01f7a Remove the code that protected FastISel from aborting in by Dan Gohman · 16 years ago
  100. be91940 Temporarily disable vector select in the bitcode reader. The by Dan Gohman · 16 years ago