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gerrit-public.fairphone.software / platform / external / llvm / b6831cb044a7f3dccd5ad80cd36b98175b9646ad
  1. b6831cb Unbreak mvi and friends - emit only 'significant' part of the operand by Anton Korobeynikov · 15 years ago
  2. 98db78a Expand fp_to_uint too by Anton Korobeynikov · 15 years ago
  3. 20d062f We don't have FP truncstores by Anton Korobeynikov · 15 years ago
  4. a89430e Expand uint_to_fp by Anton Korobeynikov · 15 years ago
  5. 4971e1e Emit proper rounding mode for fp_to_sint by Anton Korobeynikov · 15 years ago
  6. 3a9959f f32/f64 regs are stored on stack if we're short in FP regs by Anton Korobeynikov · 15 years ago
  7. 75eef89 Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects by Anton Korobeynikov · 15 years ago
  8. 1ada84d Make FP zero to be legal FP immediate via LOAD ZERO by Anton Korobeynikov · 15 years ago
  9. 5753f47 Loads are not two-address in any way by Anton Korobeynikov · 15 years ago
  10. a61a4f6 Add LOAD NEGATIVE instruction by Anton Korobeynikov · 15 years ago
  11. 03f6000 LOAD COMPLEMENT instruction is not really two-addr by Anton Korobeynikov · 15 years ago
  12. 6495063 Add multiple add/sub instructions by Anton Korobeynikov · 15 years ago
  13. 1733124 Handle FP callee-saved regs by Anton Korobeynikov · 15 years ago
  14. 85c5c3f Proper FP extloads by Anton Korobeynikov · 15 years ago
  15. 299dc78 Add proper PWS impdef's by Anton Korobeynikov · 15 years ago
  16. da723d7 Propagate FP select_cc to dag inserters by Anton Korobeynikov · 15 years ago
  17. 55e96fb Implement fp_to_sint by Anton Korobeynikov · 15 years ago
  18. 92ac82a Implement FP regs spills / restores by Anton Korobeynikov · 15 years ago
  19. c79465d Add fabs by Anton Korobeynikov · 15 years ago
  20. f1e82ce Add fneg by Anton Korobeynikov · 15 years ago
  21. 9b4ae57 We don't have native sine / cosine instructions by Anton Korobeynikov · 15 years ago
  22. 1d0ec0b More sint_to_fp stuff by Anton Korobeynikov · 15 years ago
  23. 7aa03ac Add bunch of FP instructions by Anton Korobeynikov · 15 years ago
  24. 23eff5c We don't have any FP extloads by Anton Korobeynikov · 15 years ago
  25. 10c086c Implement all comparisons by Anton Korobeynikov · 15 years ago
  26. ae53567 Add constpool lowering / printing by Anton Korobeynikov · 15 years ago
  27. 0e31d5c Allow FP arguments pass / return by Anton Korobeynikov · 15 years ago
  28. 2c97ae8 Register FP regclasses by Anton Korobeynikov · 15 years ago
  29. b13057b Add FP regs by Anton Korobeynikov · 15 years ago
  30. 81d533c Fix fallout from prev. patch by Anton Korobeynikov · 15 years ago
  31. 8bd0db7 Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems by Anton Korobeynikov · 15 years ago
  32. 09e3900 Use divide single for 32 bit signed divides by Anton Korobeynikov · 15 years ago
  33. cd3dfaf Add missed operands types by Anton Korobeynikov · 15 years ago
  34. e1c9aab Missed part of prev. patch by Anton Korobeynikov · 15 years ago
  35. 9b812b0 Another attempt to fix prologue emission by Anton Korobeynikov · 15 years ago
  36. 6fe326c Implement 'large' PIC model by Anton Korobeynikov · 15 years ago
  37. 48e8b3c Implement shifts properly (hopefilly - finally!) by Anton Korobeynikov · 15 years ago
  38. e3a7f7a Remove redundand register move by Anton Korobeynikov · 15 years ago
  39. 0a42d2b Properly handle divides. As a bonus - implement memory versions of them. by Anton Korobeynikov · 15 years ago
  40. d20af96 Fix epic fail: full-width muls are not commutable. This unbreaks bunch of stuff from SingleSource/Benchmarks/Stanford by Anton Korobeynikov · 15 years ago
  41. c097d5c 32 bit rotate is not twoaddr instruction by Anton Korobeynikov · 15 years ago
  42. 014d463 32 bit shifts have only 12 bit displacements by Anton Korobeynikov · 15 years ago
  43. 54cea74 Add proper register aliases by Anton Korobeynikov · 15 years ago
  44. c3a5196 Properly generate stack frame by Anton Korobeynikov · 15 years ago
  45. 0ba60d9 Unbreak indirect branches by Anton Korobeynikov · 15 years ago
  46. 78085ee Unbreak by Anton Korobeynikov · 15 years ago
  47. 66f1b37 Do not forget to save R15 when we allocate stack frame by Anton Korobeynikov · 15 years ago
  48. c94fdf7 All calls clobbers R14 by Anton Korobeynikov · 15 years ago
  49. 6f66f05 Unbreak calls to vararg functions by Anton Korobeynikov · 15 years ago
  50. 2bbbd5b Stupid typo by Anton Korobeynikov · 15 years ago
  51. 4656760 Typos by Anton Korobeynikov · 15 years ago
  52. 1ed1e3e Consolidate reg-imm / reg-reg-imm address mode selection logic in one place. by Anton Korobeynikov · 15 years ago
  53. 5a11e02 Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are needed during elimination of frame indexes. by Anton Korobeynikov · 15 years ago
  54. 720e3b0 Add support for 12 bit displacements by Anton Korobeynikov · 15 years ago
  55. 078e007 We already have reserved call frame regardless whether variable sized frame objects were present or not by Anton Korobeynikov · 15 years ago
  56. 980d550 Emit proper lowering of load from arg stack slot by Anton Korobeynikov · 15 years ago
  57. c772c44 Implement dynamic allocas by Anton Korobeynikov · 15 years ago
  58. c16cdc5 Add jump tables by Anton Korobeynikov · 15 years ago
  59. 983d3a1 Exapnd br_jt into indirect branch. Provide pattern for indirect branches. by Anton Korobeynikov · 15 years ago
  60. 57b04e6 Implement 64 bit immediates by Anton Korobeynikov · 15 years ago
  61. 759205d Add rotates by Anton Korobeynikov · 15 years ago
  62. cfca8b1 Add patterns for integer negate by Anton Korobeynikov · 15 years ago
  63. 8c993e1 Provide proper patterns for and with imm instructions. Tune the tests accordingly. by Anton Korobeynikov · 15 years ago
  64. 25af733 Add 32 bit and reg-imm and disable invalid patterns for now by Anton Korobeynikov · 15 years ago
  65. 747052c Add z9 and z10 target processors. Mark z10-only instructions as such. by Anton Korobeynikov · 15 years ago
  66. 71fd260 Fix MUL64rm instruction asmprinting by Anton Korobeynikov · 15 years ago
  67. 70f717f Preliminary asmprinting of globals by Anton Korobeynikov · 15 years ago
  68. ed00212 Implement asmprinting for odd-even regpairs by Anton Korobeynikov · 15 years ago
  69. 3166a9a 32-bit ri addressing mode has only 12-bit displacement by Anton Korobeynikov · 15 years ago
  70. 501f55d Forgot to add by Anton Korobeynikov · 15 years ago
  71. f366bec Do not put bunch of target-specific stuff into common namespace by Anton Korobeynikov · 15 years ago
  72. d3ba2f2 Print signed imms properly by Anton Korobeynikov · 15 years ago
  73. 4b73016 Provide hooks for spilling / restoring stuff by Anton Korobeynikov · 15 years ago
  74. 4cc7ce0 Revert thinko by Anton Korobeynikov · 15 years ago
  75. 319f381 Temporary workaround problem with signed 32-bit imm's by Anton Korobeynikov · 15 years ago
  76. 64d52d4 Implement InsertBranch() hook by Anton Korobeynikov · 15 years ago
  77. c9d4a88 Pipehole pattern for i32 imm's by Anton Korobeynikov · 15 years ago
  78. ac16b18 Bunch of sext_inreg patterns by Anton Korobeynikov · 15 years ago
  79. e00f1a7 Provide normal 32 bit load and store by Anton Korobeynikov · 15 years ago
  80. 22836d1 Proper lower 'small' results by Anton Korobeynikov · 15 years ago
  81. eb68f1c Completel forgot about unconditional branches by Anton Korobeynikov · 15 years ago
  82. bad769f Lower addresses of globals by Anton Korobeynikov · 15 years ago
  83. ed1a6d4 Test (incomplete) for easy muls by Anton Korobeynikov · 15 years ago
  84. 8d1837d Provide "wide" muls and divs/rems by Anton Korobeynikov · 15 years ago
  85. 11275eb Fix thinko by Anton Korobeynikov · 15 years ago
  86. 338cf05 Fix epic bug with invalid regclass for R0D by Anton Korobeynikov · 15 years ago
  87. d519756 Let RegisterInfo decide whether it can emit cross-class copy or not by Anton Korobeynikov · 15 years ago
  88. 3e980b4 More register pairs (now 32 bit ones) by Anton Korobeynikov · 15 years ago
  89. 05a54ff Add even-odd register pairs by Anton Korobeynikov · 15 years ago
  90. 2fdecaf Unbreak due to mainline api change by Anton Korobeynikov · 15 years ago
  91. dd0239b Preliminary mul lowering by Anton Korobeynikov · 15 years ago
  92. bf02217 More extloads by Anton Korobeynikov · 15 years ago
  93. ecf22d5 Tests for cmp / br_cc / select_cc by Anton Korobeynikov · 15 years ago
  94. 7d1e39b SELECT_CC lowering by Anton Korobeynikov · 15 years ago
  95. 4ec3e5f Conditional branches and comparisons by Anton Korobeynikov · 15 years ago
  96. c7b71be Emit correct offset for PseudoSourceValue by Anton Korobeynikov · 15 years ago
  97. 656ac6f Provide proper stack offsets for outgoing arguments by Anton Korobeynikov · 15 years ago
  98. 4f9017f Change register allocation order to reduce amount of callee-saved regs to be spilled. by Anton Korobeynikov · 15 years ago
  99. ef5deca Emit callee-saved regs spills / restores by Anton Korobeynikov · 15 years ago
  100. 33b350b Scan for presence of calls and determine max callframe size early. To allow ProcessFunctionBeforeCalleeSaveScan() use this information by Anton Korobeynikov · 15 years ago