1. a7d479c Introduce a new CodeGenInstruction::ConstraintInfo class by Chris Lattner · 15 years ago
  2. 518bb53 move target-independent opcodes out of TargetInstrInfo by Chris Lattner · 15 years ago
  3. 243a32f Remove DEBUG_DECLARE, looks like we don't need it. by Dale Johannesen · 15 years ago
  4. d203520 Add DEBUG_DECLARE. Not used yet. by Dale Johannesen · 15 years ago
  5. 87563b3 Add DEBUG_VALUE. Not used yet. by Dale Johannesen · 15 years ago
  6. 533297b Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a by Dan Gohman · 15 years ago
  7. 799d697 Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. When by Evan Cheng · 15 years ago
  8. 26207e5 Introduce the TargetInstrInfo::KILL machine instruction and get rid of the by Jakob Stoklund Olesen · 15 years ago
  9. 23132b1 prune the #includes in raw_ostream.h by moving a by Chris Lattner · 15 years ago
  10. cb778a8 1. Introduce a new TargetOperandInfo::getRegClass() helper method by Chris Lattner · 15 years ago
  11. a938ac6 make ptr_rc derive from a new PointerLikeRegClass tblgen class. by Chris Lattner · 15 years ago
  12. 1a55180 Replace std::iostreams with raw_ostream in TableGen. by Daniel Dunbar · 15 years ago
  13. 88c7af0 Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize by Dan Gohman · 16 years ago
  14. f8c7394 Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS. by Dan Gohman · 16 years ago
  15. 15511cf Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. by Dan Gohman · 16 years ago
  16. b89be61 Add RCBarriers to TargetInstrDesc. It's a list of register classes the given instruction can "clobber". For example, on x86 the call instruction can modify all of the XMM and fp stack registers. by Evan Cheng · 16 years ago
  17. 4406604 Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating by Dan Gohman · 16 years ago
  18. e4c67cd Teach the DAGISelEmitter to not compute the variable_ops operand by Dan Gohman · 16 years ago
  19. d35121a Fix a tblgen problem handling variable_ops in tblgen instruction by Dan Gohman · 16 years ago
  20. 8370d38 Add a flag to indicate that an instruction is as cheap (or cheaper) than a move by Bill Wendling · 16 years ago
  21. ee4fa19 Move instruction flag inference out of InstrInfoEmitter and into by Dan Gohman · 17 years ago
  22. c929823 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register. by Christopher Lamb · 17 years ago
  23. 20ccded Remove isImplicitDef TargetInstrDesc flag. by Evan Cheng · 17 years ago
  24. da47e6e Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF. by Evan Cheng · 17 years ago
  25. a844bde SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. by Evan Cheng · 17 years ago
  26. a22edc8 Simplify the side effect stuff a bit more and make licm/sinking by Chris Lattner · 17 years ago
  27. ba7e756 Start inferring side effect information more aggressively, and fix many bugs in the by Chris Lattner · 17 years ago
  28. 214884b if an instr lacks a pattern, assume it has side effects (unless never has s-e is true). by Chris Lattner · 17 years ago
  29. bc0b9f7 start inferring 'no side effects'. by Chris Lattner · 17 years ago
  30. 8926038 Infer mayload by Chris Lattner · 17 years ago
  31. 710e995 realize that instructions who match intrinsics that read memory read memory. by Chris Lattner · 17 years ago
  32. dcc8b4f add a mayLoad property for machine instructions, a correlary to mayStore. by Chris Lattner · 17 years ago
  33. 749c6f6 rename TargetInstrDescriptor -> TargetInstrDesc. by Chris Lattner · 17 years ago
  34. 0ff2396 Rename all the M_* flags to be namespace qualified enums, and switch by Chris Lattner · 17 years ago
  35. 8f707e1 rename hasVariableOperands() -> isVariadic(). Add some comments. by Chris Lattner · 17 years ago
  36. 4764189 Move M_* flags down in the file. Move SchedClass up in the by Chris Lattner · 17 years ago
  37. af3eb7c the name field of instructions is never set to a non-empty string, by Chris Lattner · 17 years ago
  38. 8ca5c67 Add predicates methods to TargetOperandInfo, and switch all clients by Chris Lattner · 17 years ago
  39. 834f1ce rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. by Chris Lattner · 17 years ago
  40. 2e48a70 rename isStore -> mayStore to more accurately reflect what it captures. by Chris Lattner · 17 years ago
  41. c8478d8 Change the 'isStore' inferrer to look for 'SDNPMayStore' by Chris Lattner · 17 years ago
  42. e67bde5 set the 'isstore' flag for instructions whose pattern is an by Chris Lattner · 17 years ago
  43. 2d51a4c remove some old hacky code that tried to infer whether a store by Chris Lattner · 17 years ago
  44. a529a37 rearrange some code to allow inferring instr info from the pattern of the instr, but don't do so yet. by Chris Lattner · 17 years ago
  45. 5fbe275 final cleanups. by Chris Lattner · 17 years ago
  46. ef8339b further simplifications and cleanup by Chris Lattner · 17 years ago
  47. 951740a simplify some code by Chris Lattner · 17 years ago
  48. 7b11712 split enum emission out from InstrInfoEmitter into it's own tblgen backend. by Chris Lattner · 17 years ago
  49. 2c36aff tblgen shouldn't include headers from llvm codegen. by Chris Lattner · 17 years ago
  50. 3060910 remove attributions from utils. by Chris Lattner · 17 years ago
  51. 6b1da9c Add flags to indicate that there are "never" side effects or that there "may be" by Bill Wendling · 17 years ago
  52. 3dd298f Oops. Forgot these. by Evan Cheng · 17 years ago
  53. 20ab290 Add a flag for indirect branch instructions. by Owen Anderson · 17 years ago
  54. b591082 Added TargetInstrDescriptor::numDefs - num of results. by Evan Cheng · 17 years ago
  55. 08d5207 Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350 by Christopher Lamb · 17 years ago
  56. 88cc092 Try committing again. Add OptionalDefOperand. Remove clobbersPred. by Evan Cheng · 17 years ago
  57. c419bd3 ImmutablePredicateOperand is no more. by Evan Cheng · 17 years ago
  58. 8012b07 Instructions with ImmutablePredicateOperand aren't really predicable since their predicates are fixed at isel time. by Evan Cheng · 17 years ago
  59. d45eddd Revert the earlier change that removed the M_REMATERIALIZABLE machine by Dan Gohman · 17 years ago
  60. 82a87a0 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad by Dan Gohman · 17 years ago
  61. eaa91b0 Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. by Evan Cheng · 17 years ago
  62. b5c1c9c Add clobbersPred - instruction that clobbers condition code / register which are used to predicate instructions. by Evan Cheng · 17 years ago
  63. 5127ce0 Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand. by Evan Cheng · 18 years ago
  64. 3ab6dcf Mark all (not just the first) predicate operand M_PREDICATE_OPERAND. by Evan Cheng · 18 years ago
  65. 04677a3 Recognize target instruction flag 'isReMaterializable'. by Evan Cheng · 18 years ago
  66. a683f9b Files missing from LABEL check in. by Jim Laskey · 18 years ago
  67. f5da133 What should be the last unnecessary <iostream>s in the library. by Bill Wendling · 18 years ago
  68. fb1aab0 Add opcode to TargetInstrDescriptor. by Evan Cheng · 18 years ago
  69. 0bb7500 ADd support for adding constraints to suboperands by Chris Lattner · 18 years ago
  70. f196839 allow ptr_rc to explicitly appear in an instructions operand list, it doesn't by Chris Lattner · 18 years ago
  71. a1fd650 Remove M_2_ADDR_FLAG. by Evan Cheng · 18 years ago
  72. d9a7f4d Mark predicate operands as such in operand info. by Chris Lattner · 18 years ago
  73. a0cca4a simplify the way operand flags and constraints are handled, making it easier by Chris Lattner · 18 years ago
  74. a818e92 recognize ppc's blr instruction as predicated by Chris Lattner · 18 years ago
  75. c51737f Clean up some code. by Evan Cheng · 18 years ago
  76. e2ba897 Add operand constraints to TargetInstrInfo. by Evan Cheng · 18 years ago
  77. cd4317e Eliminate data relocations by using NULL instead of global empty list. by Jim Laskey · 18 years ago
  78. 60f0992 Use an enumeration to eliminate data relocations. by Jim Laskey · 18 years ago
  79. 8d3af5e Instructions with variable operands (variable_ops) can have a number required by Evan Cheng · 18 years ago
  80. 21d03f2 lib/Target/Target.td by Evan Cheng · 19 years ago
  81. 9812f1c Noop instruction by Evan Cheng · 19 years ago
  82. 108714c Set isStore of instructions with ISD::TRUNCSTORE root node. by Evan Cheng · 19 years ago
  83. eff5c36 Put instruction names into the first non TargetInstrInfo namespace found. by Chris Lattner · 19 years ago
  84. afba446 Formating by Evan Cheng · 19 years ago
  85. 6f6360d Mark instructions whose pattern is (store ...) isStore. by Evan Cheng · 19 years ago
  86. 719c2fc Don't fill in fields that no longer exist. by Chris Lattner · 19 years ago
  87. f52e261 If we want to emit things in enum order, use getInstructionsByEnumValue to by Chris Lattner · 19 years ago
  88. 42d24c7 almost got the HP-UX tester up.. :) by Duraid Madina · 19 years ago
  89. 65303d6 Teach tblgen about instruction operands that have multiple MachineInstr by Chris Lattner · 19 years ago
  90. 6cee630 Allow itineraries to be passed through the Target Machine. by Jim Laskey · 19 years ago
  91. cb366d9 Keep VC++ happy. by Jeff Cohen · 19 years ago
  92. b5a0c0e Emit itinerary class in instruction info. by Jim Laskey · 19 years ago
  93. 366080c Switch more code over to using getValueAsListOfDefs. Look at all the -'s. :) by Chris Lattner · 19 years ago
  94. 5f89bf0 spell this variable right by Chris Lattner · 19 years ago
  95. 8b50f9b Expose a new flag to TargetInstrInfo by Chris Lattner · 19 years ago
  96. 9fdd6e3 add a marker at the end of the instruction enum list by Chris Lattner · 19 years ago
  97. 8d30c23 by Chris Lattner · 19 years ago
  98. d5aa3e2 Emit real operand info for instructions. This currently works but is bad by Chris Lattner · 19 years ago
  99. 0e384b6 For now, just emit empty operand info structures. by Chris Lattner · 19 years ago
  100. d98958f now that all of the targets are clean w.r.t. the number of operands for each by Chris Lattner · 19 years ago