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gerrit-public.fairphone.software / platform / external / llvm / d25e9e8294b913f235253cf9e22dd5ee28cbe5d8 / lib / Target
  1. d25e9e8 Fix a erroneous comment. by Evan Cheng · 19 years ago
  2. 4d7db40 more notes by Chris Lattner · 19 years ago
  3. bda54cd Tell codegen MOVAPSrr and MOVAPDrr are copies. by Evan Cheng · 19 years ago
  4. b1b4e86 Added SSE entries to foldMemoryOperand(). by Evan Cheng · 19 years ago
  5. 78376d5 Rearrange code to my liking. :) by Evan Cheng · 19 years ago
  6. 5887327 add a method by Chris Lattner · 19 years ago
  7. 3e2b94a another note by Chris Lattner · 19 years ago
  8. 77f0885 Add immediate forms of cmov and remove some cruft by Andrew Lenharth · 19 years ago
  9. 20ea062 Finegrainify namespacification by Chris Lattner · 19 years ago
  10. 5a7efc9 add a note by Chris Lattner · 19 years ago
  11. 750ac1b Fix some of the stuff in the PPC README file, and clean up legalization by Nate Begeman · 19 years ago
  12. 1f7c630 add a note, I'll take care of this after nate commits his big patch by Chris Lattner · 19 years ago
  13. 3c55c54 - Use xor to clear integer registers (set R, 0). by Evan Cheng · 19 years ago
  14. 214a794 Remove another entry. by Evan Cheng · 19 years ago
  15. 3e1d5e5 Another regression from the pattern isel by Chris Lattner · 19 years ago
  16. 760df29 Return's chain should be matching either the chain produced by the by Evan Cheng · 19 years ago
  17. 0ddc180 another testcase. by Chris Lattner · 19 years ago
  18. 0d084c9 When folding a load into a return of SSE value, check the chain to by Evan Cheng · 19 years ago
  19. 4ccf4c0 Remove an item. It's done. by Evan Cheng · 19 years ago
  20. 0e8671b Be smarter about whether to store the SSE return value in memory. If by Evan Cheng · 19 years ago
  21. bb1d528 turning these into 'adds' would require extra copies by Chris Lattner · 19 years ago
  22. 223547a - Allow XMM load (for scalar use) to be folded into ANDP* and XORP*. by Evan Cheng · 19 years ago
  23. 598463f Remove entries on fabs and fneg. These are done. by Evan Cheng · 19 years ago
  24. b8973bd Allow the specification of explicit alignments for constant pool entries. by Evan Cheng · 19 years ago
  25. 259e97c * Fix 80-column violations by Chris Lattner · 19 years ago
  26. ddc787d add info about the inline asm register constraints for PPC by Chris Lattner · 19 years ago
  27. c03468b add a missing break that caused a lot of failures last night :( by Chris Lattner · 19 years ago
  28. 4477590 Codegen by Nate Begeman · 19 years ago
  29. a34b898 okay, one more by Chris Lattner · 19 years ago
  30. fabec5b another note by Chris Lattner · 19 years ago
  31. 76e7a44 More notes by Chris Lattner · 19 years ago
  32. a45b492 another one by Chris Lattner · 19 years ago
  33. 302601c add a note by Chris Lattner · 19 years ago
  34. af370f7 add conditional moves of float and double values on int/fp condition codes. by Chris Lattner · 19 years ago
  35. 83e64ba example nate pointed out by Chris Lattner · 19 years ago
  36. 7a4d291 treat conditional branches the same way as conditional moves (giving them by Chris Lattner · 19 years ago
  37. 6788faa compactify all of the integer conditional moves into one instruction that takes by Chris Lattner · 19 years ago
  38. 97f9102 Add immediate forms of integer cmovs by Chris Lattner · 19 years ago
  39. 749d6fa Shrinkify by Chris Lattner · 19 years ago
  40. 6dc83c7 Add the full complement of conditional moves of integer registers. by Chris Lattner · 19 years ago
  41. 86638b9 Compile this: by Chris Lattner · 19 years ago
  42. ef6ffb1 Added custom lowering of fabs by Evan Cheng · 19 years ago
  43. 56b6964 add the 'lucas' optimization by Chris Lattner · 19 years ago
  44. b716343 I don't see why this optimization isn't safe, but it isn't, so disable it by Chris Lattner · 19 years ago
  45. 8e38ae6 Another high-prio selection performance bug by Chris Lattner · 19 years ago
  46. 594086d more mumbling by Chris Lattner · 19 years ago
  47. bdde465 add some notes by Chris Lattner · 19 years ago
  48. 6dfa999 Don't generate complex sequence for SETOLE, SETOLT, SETULT, and SETUGT. Flip by Evan Cheng · 19 years ago
  49. 2adc05c Fix FP constants, and the SparcV8/2006-01-22-BitConvertLegalize.ll failure from last night by Chris Lattner · 19 years ago
  50. 02568ff i64 -> f32, f32 -> i64 and some clean up. by Evan Cheng · 19 years ago
  51. 6dab053 Always use FP stack instructions to perform i64 to f64 as well as f64 to i64 by Evan Cheng · 19 years ago
  52. 3772bcb Revamp the ICC/FCC reading instructions to be parameterized in terms of the by Chris Lattner · 19 years ago
  53. 9072c05 Compile: by Chris Lattner · 19 years ago
  54. 5295de7 If the target has V9 instructions, this pass is a noop, don't bother running it. by Chris Lattner · 19 years ago
  55. b34d3fd When in v9 mode, emit fabsd/fnegd/fmovd by Chris Lattner · 19 years ago
  56. 76afdc9 First step towards V9 instructions in the V8 backend, two conditional move by Chris Lattner · 19 years ago
  57. 6f63001 Two changes: by Chris Lattner · 19 years ago
  58. dea9528 When lowering SELECT_CC, see if the input is a lowered SETCC. If so, fold by Chris Lattner · 19 years ago
  59. c6fd6cd Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. by Chris Lattner · 19 years ago
  60. 4a397e0 Implement isMaskedValueZeroForTargetNode for the various v8 selectcc nodes, by Chris Lattner · 19 years ago
  61. 87c890a adjust prototype by Chris Lattner · 19 years ago
  62. 37dd6f1 Functions that are lazily streamed in from the .bc file are *not* external. by Chris Lattner · 19 years ago
  63. c7097af add another note by Chris Lattner · 19 years ago
  64. 5164a31 add some performance notes from looking at sgefa by Chris Lattner · 19 years ago
  65. 6a28456 add a high-priority SSE issue from sgefa by Chris Lattner · 19 years ago
  66. b638cd8 add a missed optimization by Chris Lattner · 19 years ago
  67. d9b55dd Now that OpActions is big enough, we can specify actions for vector types by Chris Lattner · 19 years ago
  68. 3fd327f disable this for now by Chris Lattner · 19 years ago
  69. 2ce5b26 Add a note about lowering llvm.memset, llvm.memcpy, and llvm.memmove to a by Reid Spencer · 19 years ago
  70. 0fc9c26 remove now-dead code, the legalizer takes care of this for us by Chris Lattner · 19 years ago
  71. 44d9b9b The FP stack doesn't support UNDEF, ask the legalizer to legalize it by Chris Lattner · 19 years ago
  72. ec4a0c7 Request expansion of ConstantVec nodes. by Chris Lattner · 19 years ago
  73. a54aa94 Targets all now request ConstantFP to be legalized into TargetConstantFP. by Chris Lattner · 19 years ago
  74. 08a9022 Update alpha to reflect recent constantfp legalize changes. It's not clear by Chris Lattner · 19 years ago
  75. c7e1852 cmovle != cmovlt by Chris Lattner · 19 years ago
  76. b8643ac Fix typo. by Jeff Cohen · 19 years ago
  77. c4013d6 Flesh out AMD family/models. by Jeff Cohen · 19 years ago
  78. 216d281 Correctly determine CPU vendor. by Jeff Cohen · 19 years ago
  79. a349640 Use union instead of reinterpret_cast. by Jeff Cohen · 19 years ago
  80. 7617717 Fix recognition of Intel CPUs. by Jeff Cohen · 19 years ago
  81. c2fad161 Is64Bit reflects the capability of the chip, not an aspect of the target os by Chris Lattner · 19 years ago
  82. dabbc98 Fix a bunch of JIT failures with the new isel by Chris Lattner · 19 years ago
  83. 41adb0d Improve X86 subtarget support for Windows and AMD. by Jeff Cohen · 19 years ago
  84. 6b2469c silence a warning by Chris Lattner · 19 years ago
  85. e00ebf0 Fix a bug in my elimination of ISD::CALL this morning. PPC now has to by Chris Lattner · 19 years ago
  86. 1e39a15 make this work on non-native hosts by Chris Lattner · 19 years ago
  87. 9690979 add a note about how we should implement this FIXME from the legalizer: by Chris Lattner · 19 years ago
  88. 0aed784 Implement Promote for VAARG, and allow it to be custom promoted for people by Nate Begeman · 19 years ago
  89. eb20ed6 Add a couple more things to the readme. by Nate Begeman · 19 years ago
  90. 34fa038 Remove some dead code by Chris Lattner · 19 years ago
  91. 2d90bd5 Switch to AlphaISD::CALL instead of ISD::CALL by Chris Lattner · 19 years ago
  92. 281b55e Use PPCISD::CALL instead of ISD::CALL by Chris Lattner · 19 years ago
  93. 44ea7b1 Use V8ISD::CALL instead of ISD::CALL by Chris Lattner · 19 years ago
  94. d41e9e5 A bit of wisdom from Chris on the last entry. by Evan Cheng · 19 years ago
  95. 85214ba AT&T assembly convention: registers are in lower case. by Evan Cheng · 19 years ago
  96. 184cc4a initialize member vars by Chris Lattner · 19 years ago
  97. 104988a initialize all instance vars by Chris Lattner · 19 years ago
  98. bba534d Make llvm.frame/returnaddr not crash on ppc by Chris Lattner · 19 years ago
  99. e826a01 Added notes about a x86 isel deficiency. by Evan Cheng · 19 years ago
  100. dbd38d7 Added a temporary option -enable-x86-sse to enable sse support. It is used by by Evan Cheng · 19 years ago