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gerrit-public.fairphone.software / platform / external / llvm / e7d238ea239e6ab8a2c60ecd27468f3cfc1bb08b / lib / CodeGen / SelectionDAG
  1. e7d238e Make the NaN test come second, heuristically assuming that NaNs are less common. by Dan Gohman · 16 years ago
  2. 01426e1 Fix gcc.c-torture/compile/920520-1.c by inserting bitconverts by Chris Lattner · 16 years ago
  3. d659d50 Fast-isel no longer an experiment. by Dan Gohman · 16 years ago
  4. d398672 Support operations like fp_to_uint with a vector by Duncan Sands · 16 years ago
  5. b5f68e2 LegalizeTypes support for atomic operation promotion. by Duncan Sands · 16 years ago
  6. 49c18cc Use DAG.getIntPtrConstant rather than DAG.getConstant by Duncan Sands · 16 years ago
  7. 7e49822 Always use either MVT::i1 or getSetCCResultType for by Duncan Sands · 16 years ago
  8. ef5b199 Formatting - no functional change. by Duncan Sands · 16 years ago
  9. f6e2949 Don't use a random type for the select condition, by Duncan Sands · 16 years ago
  10. a1dc602 Set N->OperandList to 0 after deletion. Otherwise, it's possible that it will by Bill Wendling · 16 years ago
  11. 181b627 Fix comment. Other formatting changes. No functionality changes. by Bill Wendling · 16 years ago
  12. 0e3da1d Vector shuffle mask elements may be "undef". Handle by Duncan Sands · 16 years ago
  13. 94989ac Use a legal integer type for vector shuffle mask by Duncan Sands · 16 years ago
  14. 2a0b96c Reapply r57699 with a fix to not crash on asms with multiple results. Unlike by Chris Lattner · 16 years ago
  15. 668aff6 Don't truncate GlobalAddress offsets to int in debug output. by Dan Gohman · 16 years ago
  16. 6520e20 Teach DAGCombine to fold constant offsets into GlobalAddress nodes, by Dan Gohman · 16 years ago
  17. 9591573 Revert r57699. It's causing regressions in by Dan Gohman · 16 years ago
  18. c227734 Factor out the code for mapping LLVM IR condition opcodes to by Dan Gohman · 16 years ago
  19. cfc14c1 add support for 128 bit aggregates. by Chris Lattner · 16 years ago
  20. c4d1021 Added MemIntrinsicNode which is useful to represent target intrinsics that by Mon P Wang · 16 years ago
  21. 8c1a6ca Factor out the code for mapping LLVM IR condition opcodes to by Dan Gohman · 16 years ago
  22. 0c52644 Fix PR2356 on PowerPC: if we have an input and output that are tied together by Chris Lattner · 16 years ago
  23. 81249c9 refactor some code into a helper method, no functionality change. by Chris Lattner · 16 years ago
  24. 6bdcda3 Keep track of *which* input constraint matches an output by Chris Lattner · 16 years ago
  25. 58f15c4 add an assert so that PR2356 explodes instead of running off an by Chris Lattner · 16 years ago
  26. 74feef2 Define patterns for shld and shrd that match immediate by Dan Gohman · 16 years ago
  27. 7f04268 - Add target lowering hooks that specify which setcc conditions are illegal, by Evan Cheng · 16 years ago
  28. dd5b58a FastISel support for exception-handling constructs. by Dan Gohman · 16 years ago
  29. 0329466 Rename LoadX to LoadExt. by Evan Cheng · 16 years ago
  30. b8cab92 Fix command-line option printing to print two spaces where needed, by Dan Gohman · 16 years ago
  31. efa5339 FIX PR2794. Make sure SIGN_EXTEND_INREG nodes introduced by LegalizeSetCCOperands are leglized. Patch by Richard Pennington. by Evan Cheng · 16 years ago
  32. d9d0778 * Make TargetLowering not crash when TargetMachine::getTargetAsmInfo() returns by Matthijs Kooijman · 16 years ago
  33. 44d2a98 calls can be supported. by Chris Lattner · 16 years ago
  34. e563bbc Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as by Chris Lattner · 16 years ago
  35. 3c26101 simplify comparison by Chris Lattner · 16 years ago
  36. 23a9855 Add a "loses information" return value to APFloat::convert by Dale Johannesen · 16 years ago
  37. 7111b02 Rename APFloat::convertToAPInt to bitcastToAPInt to by Dale Johannesen · 16 years ago
  38. 1e9e8c3 Avoid emitting redundant materializations of integer constants by Dan Gohman · 16 years ago
  39. 2163ca1 Use Dan's supperior check by Andrew Lenharth · 16 years ago
  40. ff75d9e No need for |= by Andrew Lenharth · 16 years ago
  41. 1ad0c82 Use ADDC if it is valid at any smaller size. Do it right this time by Andrew Lenharth · 16 years ago
  42. 5c9cc13 Use ADDC if it is valid at any smaller size. fixes test/Codegen/Generic/i128-addsub.ll on x86 by Andrew Lenharth · 16 years ago
  43. 40d5139 Expand arith on machines without carry flags by Andrew Lenharth · 16 years ago
  44. b5cc34d Correctly handle calls with no return values. This fixes by Dan Gohman · 16 years ago
  45. 31d7161 wrap some long lines and expand i32 mul's to libcalls, inspired by a by Chris Lattner · 16 years ago
  46. 241f464 Fix fast-isel's handling of atomic instructions. They may by Dan Gohman · 16 years ago
  47. 1b54c7f Pass MemOperand through for 64-bit atomics on 32-bit, by Dale Johannesen · 16 years ago
  48. ca0a5d9 Use -1ULL instead of uint64_t(-1), at Anton's suggestion. by Dan Gohman · 16 years ago
  49. e47561c The result of getSetCCResultType (eg: i32) may be larger by Duncan Sands · 16 years ago
  50. 91b6f97 Implement fast-isel support for zero-extending from i1. by Dan Gohman · 16 years ago
  51. d98d620 Optimize conditional branches in X86FastISel. This replaces by Dan Gohman · 16 years ago
  52. 48c1bc2 Handle some 64-bit atomics on x86-32, some of the time. by Dale Johannesen · 16 years ago
  53. aeaf245 Make some implicit conversions explicit, to avoid compiler warnings. by Dan Gohman · 16 years ago
  54. 38ac062 Fold trivial two-operand tokenfactors where the operands are equal immediately. by Dan Gohman · 16 years ago
  55. 929d3eb Fix typos in comments. by Dan Gohman · 16 years ago
  56. 6158d84 Implement the -fno-builtin option in the front-end, not in the back-end. by Bill Wendling · 16 years ago
  57. fd8ca5a - Initialize "--no-builtin" to "false". - Testcase for r56885. by Bill Wendling · 16 years ago
  58. 6f287b2 Add the new `-no-builtin' flag. This flag is meant to mimic the GCC by Bill Wendling · 16 years ago
  59. 5ec9efd Move the primary fast-isel top-level comments to FastISel.cpp, where by Dan Gohman · 16 years ago
  60. f06c835 Optimize SelectionDAG's AssignTopologicalOrder even further. by Dan Gohman · 16 years ago
  61. 71d1bf5 Remove misuse of ReplaceNodeResults for atomics with by Dale Johannesen · 16 years ago
  62. a43abd1 Fix FastISel to not initialize the PIC-base register multiple times by Dan Gohman · 16 years ago
  63. d5d8191 Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc: by Bill Wendling · 16 years ago
  64. 7810bfe Rename ConstantSDNode's getSignExtended to getSExtValue, for by Dan Gohman · 16 years ago
  65. 36a5502 Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0. by Evan Cheng · 16 years ago
  66. 86098bd Add "inreg" field to CallSDNode (doesn't increase by Dale Johannesen · 16 years ago
  67. 0598866 Large mechanical patch. by Devang Patel · 16 years ago
  68. c9c6da6 Accept 'inreg' attribute on x86 functions as by Dale Johannesen · 16 years ago
  69. 5dd9c2e Support for i1 XOR in FastISel. It is actually safe because by Dan Gohman · 16 years ago
  70. 77ca41e Don't print fast-isel debug messages by default. Thanks Chris! by Dan Gohman · 16 years ago
  71. 2c442ed Don't forget the newline in debug output. by Dan Gohman · 16 years ago
  72. 33134c4 FastISel support for debug info. by Dan Gohman · 16 years ago
  73. 4b052dc bug 2812: Segmentation fault on a big emdiam processor. by Richard Pennington · 16 years ago
  74. dceffe6 Fix a recent fast-isel coverage regression - don't bail out before by Dan Gohman · 16 years ago
  75. 2c4bf11 Enable DeadMachineInstructionElim when Fast-ISel is enabled. by Dan Gohman · 16 years ago
  76. aa765b8 <rdar://problem/6234798> Assertion failed: (!OpInfo.AssignedRegs.Regs.empty() && "Couldn't allocate input reg!") by Evan Cheng · 16 years ago
  77. 8e3455b Remove SelectionDag early allocation of registers by Dale Johannesen · 16 years ago
  78. f3cbca2 Reapplying r56550 by Bill Wendling · 16 years ago
  79. 688d1c4 Forgot this part with my last patch. Sorry about the breakage. by Bill Wendling · 16 years ago
  80. 83e05c4 Temporarily revert r56550 until missing commit can be added. by Eric Christopher · 16 years ago
  81. df0c7bc Refactor the constant folding code into it's own function. And call it from both by Bill Wendling · 16 years ago
  82. 86b49f8 Next round of earlyclobber handling. Approach the by Dale Johannesen · 16 years ago
  83. da43bcf Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc. by Evan Cheng · 16 years ago
  84. eaf42ab s/ParameterAttributes/Attributes/g by Devang Patel · 16 years ago
  85. d57dd5f Arrange for FastISel code to have access to the MachineModuleInfo by Dan Gohman · 16 years ago
  86. 086ec99 Replace the LiveRegs SmallSet with a simple counter that keeps by Dan Gohman · 16 years ago
  87. 87a0f10 Fix the alignment of loads from constant pool entries when the by Dan Gohman · 16 years ago
  88. 0bb4160 Make log, log2, log10, exp, exp2 use Expand by default. by Dale Johannesen · 16 years ago
  89. 242ebd1 Per review feedback: Only perform by Evan Cheng · 16 years ago
  90. 3d01fc7 Initial support for the CMake build system. by Oscar Fuentes · 16 years ago
  91. cd4c73a Add helper function to get a 32-bit floating point constant. No functionality change. by Bill Wendling · 16 years ago
  92. ca19a3f don't print GlobalAddressSDNode's with an offset of zero as "foo0". by Chris Lattner · 16 years ago
  93. 2ff7fd1 Refactor X86SelectConstAddr, folding it into X86SelectAddress. This by Dan Gohman · 16 years ago
  94. ee2e403 Add a new "fast" scheduler. This is currently basically just a by Dan Gohman · 16 years ago
  95. 91aac10 Add a bit to mark operands of asm's that conflict by Dale Johannesen · 16 years ago
  96. 5993258 Don't worry about clobbering physical register defs that aren't used. by Dan Gohman · 16 years ago
  97. 1cd3327 When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes. by Evan Cheng · 16 years ago
  98. 50284d8 Change SelectionDAG::getConstantPool to always set the alignment of the by Dan Gohman · 16 years ago
  99. 056292f Reverting r56249. On further investigation, this functionality isn't needed. by Bill Wendling · 16 years ago
  100. aed48bf Include the alignment value when displaying ConstantPoolSDNodes. by Dan Gohman · 16 years ago