| commit | 08bcbfdc07ed6ba371998b00deb7a2a67357c6af | [log] [tgz] |
|---|---|---|
| author | Marek Olšák <marek.olsak@amd.com> | Thu Sep 08 20:15:51 2016 +0200 |
| committer | Marek Olšák <marek.olsak@amd.com> | Fri Sep 09 22:45:07 2016 +0200 |
| tree | 605f4909486f27f2609014bf4b28509f5fc1e8a2 | |
| parent | a5a2cc530c1f493557c232557ad1910e607712c2 [diff] |
radeonsi: flush TC L2 before using a compute indirect buffer There is no known test for this. Cc: 12.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>