commit 494effd242d9311f5ff1c923d55322970e4296bc
author Eric Anholt <eric@anholt.net> Mon Nov 20 10:14:38 2017 -0800
committer Eric Anholt <eric@anholt.net> Mon Nov 20 13:54:45 2017 -0800
tree 7a48a284dffe13513e9b9946c2ec530cd000b4a8
parent 9d5972da801e15670f95bc57e87ac823a797ee05

broadcom/vc5: Align 1D texture miplevels to 64b.

Fixes tex-miplevel-selection GL2:texture() 1D

src/gallium/drivers/vc5/vc5_resource.c

diff --git a/src/gallium/drivers/vc5/vc5_resource.c b/src/gallium/drivers/vc5/vc5_resource.c
index dad238f8..768f8d4 100644
--- a/src/gallium/drivers/vc5/vc5_resource.c
+++ b/src/gallium/drivers/vc5/vc5_resource.c
@@ -442,6 +442,8 @@
 
                 if (!rsc->tiled) {
                         slice->tiling = VC5_TILING_RASTER;
+                        if (prsc->target == PIPE_TEXTURE_1D)
+                                level_width = align(level_width, 64 / rsc->cpp);
                 } else {
                         if ((i != 0 || !uif_top) &&
                             (level_width <= utile_w ||