commit | 4eb416bd9d670f55fe9691bcd75950f728a0b782 | [log] [tgz] |
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author | Nicolai Hähnle <nicolai.haehnle@amd.com> | Tue Feb 09 13:02:34 2016 -0500 |
committer | Nicolai Hähnle <nicolai.haehnle@amd.com> | Wed Mar 09 11:39:55 2016 -0500 |
tree | 58397c6e0fd9b93c97c7c0e86320061298740e95 | |
parent | 10b2b584ee6018ad3ae8ee5c494a02705a906957 [diff] |
gallivm: special case TGSI_OPCODE_STORE This instruction has the resource (buffer or image) as a destination to represent the writemask for SSBO writes. However, this is obviously not a "real" destination for the purpose of emitting LLVM IR. Reviewed-by: Marek Olšák <marek.olsak@amd.com>