| commit | 76daa30e4a0d3dfe04c5b79fcdfba17fb1656ccd | [log] [tgz] |
|---|---|---|
| author | Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> | Thu Jan 04 02:11:51 2018 +0100 |
| committer | Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> | Thu Jan 04 19:35:36 2018 +0100 |
| tree | f78635ef076cf4db6530389e5da75ef55591a048 | |
| parent | f2c9f13ec2fdab99f5aa7f32845ee94dd1942fe9 [diff] |
radv: Use correct flush bits for flushing L2 during CB/DB flushes. Copied from radeonsi. Putting in the correct metadata flush commands for eventually not flushing L2 on CB/DB switch. Does not remove the need for V_028A90_CACHE_FLUSH_AND_INV_TS_EVENT at the moment. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>