commit | 8bed1adfc144d9ae8d55ccb9b277942da8a78064 | [log] [tgz] |
---|---|---|
author | Francisco Jerez <currojerez@riseup.net> | Thu Sep 01 22:12:04 2016 -0700 |
committer | Francisco Jerez <currojerez@riseup.net> | Wed Sep 14 14:50:58 2016 -0700 |
tree | 9f424997046dd786c1c4e85b23eb8f960e51333a | |
parent | 3a74e437fdec02c28749c94bc1bcf21c3c4b48d7 [diff] |
i965/vec4: Assign correct destination offset to rewritten instruction in register coalesce. Because the pass already checks that the destination offset of each 'scan_inst' that needs to be rewritten matches 'inst->src[0].offset' exactly, the final offset of the rewritten instruction is just the original destination offset of the copy. This is in preparation for adding support for sub-GRF offsets to the VEC4 IR. Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>