Merge remote-tracking branch 'aosp/upstream-20.0' into AOSP mesa/master
This merges the upstream mesa/20.0 branch into AOSP/master.
The result of this merge matches the rebased tree here:
https://github.com/johnstultz-work/mesa/commits/aosp-rebase-20.0
Which is a forward port of the rebased tree here:
https://github.com/johnstultz-work/mesa/commits/aosp-rebase-19.1
Which matched AOSP/master prior to this merge.
This merge preserves the changes in AOSP with the exception of:
* 71abf2496558 Convert genxml to Android.bp
and a portion of:
* 69f2c0128d2b Merge branch 'aosp/upstream-18.0'
which can be found here:
https://github.com/johnstultz-work/mesa/commit/7a46341325da45706b06895acacc302a44aba63f
As both collided badly and were causing build issues, so they
were dropped (seemingly without consequence).
Some additional fixes, some of which are pending in upstream
mesa staging/20.0 are also needed to get this building properly
and so I'll submit those changes following this merge.
* aosp/upstream-20.0: (9210 commits)
docs: Add sha256sums for 20.0.1
Bump version for 20.0.1
docs: add relnotes for 20.0.1
Revert "glx: convert glx_config_create_list to one big calloc"
intel/gen12+: Disable mid thread preemption.
aco: fix carry-out size for wave32 v_add_co_u32_e64
aco: keep track of which events are used in a barrier
intel/device: bdw_gt1 actually has 6 eus per subslice
intel: fix the gen 12 compute shader scratch IDs
intel: fix the gen 11 compute shader scratch IDs
.pick_status.json: Update to 0ac731b1ff96de46998948aa06081efa5140d50e
mesa/st: fix formats required for EXT_texture_norm16
intel/compiler: Restrict cs_threads to 64
.pick_status.json: Update to 3503cb4c28e01b34f3a25546c058150709c22348
mesa: fix incorrect prim.begin/end for glMultiDrawElements
turnip: fix srgb MRT
aco: Fix signed-vs-unsigned warning.
ac/llvm: flush denorms for nir_op_fmed3 on GFX8 and older gens
ac/llvm: fix 16-bit fmed3 on GFX8 and older gens
ac/llvm: fix 64-bit fmed3
...
Signed-off-by: John Stultz <john.stultz@linaro.org>
Change-Id: I7f357d5c97586819fa3d2a2074054d0a5c889cfd
diff --git a/aosp-gen-prebuilt.sh b/aosp-gen-prebuilt.sh
index e6b5d35..f1bf7d31 100755
--- a/aosp-gen-prebuilt.sh
+++ b/aosp-gen-prebuilt.sh
@@ -1,10 +1,11 @@
-mkdir -p prebuilt-intermediates/{glsl,ir3,main,nir,spirv,cle,isl,perf,genxml,compiler,iris,util,vulkan,xmlpool}
+mkdir -p prebuilt-intermediates/{glsl,ir3,main,nir,spirv,cle,isl,perf,genxml,compiler,lima,midgard,iris,util,virgl,vulkan,xmlpool}
python src/compiler/glsl/ir_expression_operation.py strings > prebuilt-intermediates/glsl/ir_expression_operation_strings.h
python src/compiler/glsl/ir_expression_operation.py constant > prebuilt-intermediates/glsl/ir_expression_operation_constant.h
python src/compiler/glsl/ir_expression_operation.py enum > prebuilt-intermediates/glsl/ir_expression_operation.h
python src/freedreno/ir3/ir3_nir_trig.py -p src/compiler/nir > prebuilt-intermediates/ir3/ir3_nir_trig.c
+python src/freedreno/ir3/ir3_nir_imul.py -p src/compiler/nir > prebuilt-intermediates/ir3/ir3_nir_imul.c
python src/mesa/main/format_pack.py src/mesa/main/formats.csv > prebuilt-intermediates/main/format_pack.c
python src/mesa/main/format_unpack.py src/mesa/main/formats.csv > prebuilt-intermediates/main/format_unpack.c
@@ -42,6 +43,7 @@
src/intel/genxml/gen9.xml \
src/intel/genxml/gen10.xml \
src/intel/genxml/gen11.xml \
+ src/intel/genxml/gen12.xml \
> prebuilt-intermediates/genxml/genX_bits.h
python src/intel/genxml/gen_zipped_file.py \
@@ -55,6 +57,7 @@
src/intel/genxml/gen9.xml \
src/intel/genxml/gen10.xml \
src/intel/genxml/gen11.xml \
+ src/intel/genxml/gen12.xml \
> prebuilt-intermediates/genxml/genX_xml.h
@@ -65,6 +68,12 @@
python src/util/merge_driinfo.py src/gallium/auxiliary/pipe-loader/driinfo_gallium.h src/gallium/drivers/iris/driinfo_iris.h > prebuilt-intermediates/iris/iris_driinfo.h
+python src/util/merge_driinfo.py src/gallium/auxiliary/pipe-loader/driinfo_gallium.h src/gallium/drivers/virgl/virgl_driinfo.h.in > prebuilt-intermediates/virgl/virgl_driinfo.h
+
+
+python src/gallium/drivers/lima/ir/lima_nir_algebraic.py -p src/compiler/nir/ > prebuilt-intermediates/lima/lima_nir_algebraic.c
+python src/panfrost/midgard/midgard_nir_algebraic.py -p src/compiler/nir/ > prebuilt-intermediates/midgard/midgard_nir_algebraic.c
+
python src/intel/compiler/brw_nir_trig_workarounds.py -p src/compiler/nir > prebuilt-intermediates/compiler/brw_nir_trig_workarounds.c
@@ -82,7 +91,9 @@
src/intel/perf/oa-cflgt2.xml \
src/intel/perf/oa-cflgt3.xml \
src/intel/perf/oa-cnl.xml \
- src/intel/perf/oa-icl.xml
+ src/intel/perf/oa-icl.xml \
+ src/intel/perf/oa-lkf.xml \
+ src/intel/perf/oa-tgl.xml
xgettext -L C --from-code utf-8 -o prebuilt-intermediates/xmlpool/xmlpool.pot src/util/xmlpool/t_options.h