commit b6168c3b83d750cb0db2d6a4ae6ee52e2e520292
author Ilia Mirkin <imirkin@alum.mit.edu> Sat Apr 08 14:56:16 2017 -0400
committer Emil Velikov <emil.l.velikov@gmail.com> Wed Apr 12 11:32:28 2017 +0100
tree a5a3f4794f6db4ce0ddeeb3133bc6390edc7ec3b
parent 12d7da771729e9d93000129762996bac0c442976

nvc0: increase texture buffer object alignment to 256 for pre-GM107

We currently don't pass the low byte of the address via the surface
info, so in order to work with images, these have to implicitly be
aligned to 256. The proprietary driver also doesn't go out of its way to
provide lower alignment.

Fixes GL45-CTS.texture_buffer.texture_buffer_texture_buffer_range

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 8036809799c453b02f4c8fedbb5faaeb19af90c2)

src/gallium/drivers/nouveau/nvc0/nvc0_screen.c

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 8aef7c9..8477d66 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -147,7 +147,7 @@
    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
       return 256;
    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
-      if (class_3d < NVE4_3D_CLASS)
+      if (class_3d < GM107_3D_CLASS)
          return 256; /* IMAGE bindings require alignment to 256 */
       return 16;
    case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: