nvc0: enable very initial support for nvf0 (GK110)
Shaders need a lot of work still. Basic stuff generally works, so this
is basically just fine for gnome-shell, OA etc at this point.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
diff --git a/src/gallium/drivers/nouveau/nv_object.xml.h b/src/gallium/drivers/nouveau/nv_object.xml.h
index 2fd52ac..95210c5 100644
--- a/src/gallium/drivers/nouveau/nv_object.xml.h
+++ b/src/gallium/drivers/nouveau/nv_object.xml.h
@@ -189,6 +189,7 @@
#define NVC1_3D_CLASS 0x00009197
#define NVC8_3D_CLASS 0x00009297
#define NVE4_3D_CLASS 0x0000a097
+#define NVF0_3D_CLASS 0x0000a197
#define NV50_2D_CLASS 0x0000502d
#define NVC0_2D_CLASS 0x0000902d
#define NV50_COMPUTE_CLASS 0x000050c0
@@ -201,6 +202,7 @@
#define BLOB_NVC0_PCOPY1_CLASS 0x000090b8
#define BLOB_NVC0_PCOPY0_CLASS 0x000090b5
#define NVE4_P2MF_CLASS 0x0000a040
+#define NVF0_P2MF_CLASS 0x0000a140
#define NV31_MPEG_CLASS 0x00003174
#define NV84_MPEG_CLASS 0x00008274
diff --git a/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_gk110.cpp
index bdf37ec..e752e90 100644
--- a/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_gk110.cpp
+++ b/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_gk110.cpp
@@ -1144,13 +1144,45 @@
void
CodeEmitterGK110::emitVFETCH(const Instruction *i)
{
- emitNOP(i); // TODO
+ uint32_t offset = i->src(0).get()->reg.data.offset;
+
+ code[0] = 0x00000002 | (offset << 23);
+ code[1] = 0x7ec00000 | (offset >> 9);
+
+#if 0
+ if (i->perPatch)
+ code[0] |= 0x100;
+ if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
+ code[0] |= 0x200; // yes, TCPs can read from *outputs* of other threads
+#endif
+
+ emitPredicate(i);
+
+ defId(i->def(0), 2);
+ srcId(i->src(0).getIndirect(0), 10);
+ srcId(i->src(0).getIndirect(1), 32 + 10); // vertex address
}
void
CodeEmitterGK110::emitEXPORT(const Instruction *i)
{
- emitNOP(i); // TODO
+ uint32_t offset = i->src(0).get()->reg.data.offset;
+
+ code[0] = 0x00000002 | (offset << 23);
+ code[1] = 0x7f000000 | (offset >> 9);
+
+#if 0
+ if (i->perPatch)
+ code[0] |= 0x100;
+#endif
+
+ emitPredicate(i);
+
+ assert(i->src(1).getFile() == FILE_GPR);
+
+ srcId(i->src(0).getIndirect(0), 10);
+ srcId(i->src(0).getIndirect(1), 32 + 10); // vertex base address
+ srcId(i->src(1), 2);
}
void
@@ -1162,13 +1194,35 @@
void
CodeEmitterGK110::emitInterpMode(const Instruction *i)
{
- emitNOP(i); // TODO
+ code[1] |= i->ipa << 21; // TODO: INTERP_SAMPLEID
}
void
CodeEmitterGK110::emitINTERP(const Instruction *i)
{
- emitNOP(i); // TODO
+ const uint32_t base = i->getSrc(0)->reg.data.offset;
+
+ code[0] = 0x00000002 | (base << 31);
+ code[1] = 0x74800000 | (base >> 1);
+
+ if (i->saturate)
+ code[1] |= 1 << 18;
+
+ if (i->op == OP_PINTERP)
+ srcId(i->src(1), 23);
+ else
+ code[0] |= 0xff << 23;
+
+ srcId(i->src(0).getIndirect(0), 10);
+ emitInterpMode(i);
+
+ emitPredicate(i);
+ defId(i->def(0), 2);
+
+ if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
+ srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 10);
+ else
+ code[1] |= 0xff << 10;
}
void
diff --git a/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp
index 588baa8..2dd7fd2 100644
--- a/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp
+++ b/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp
@@ -351,7 +351,14 @@
if (file == FILE_MEMORY_CONST && getChipset() >= 0xe0) // wrong encoding ?
return typeSizeof(ty) <= 8;
if (ty == TYPE_B96)
- return (file == FILE_SHADER_INPUT) || (file == FILE_SHADER_OUTPUT);
+ return false;
+ if (getChipset() >= 0xf0) {
+ // XXX: find wide vfetch/export
+ if (ty == TYPE_B128)
+ return false;
+ if (ty == TYPE_U64)
+ return false;
+ }
return true;
}
diff --git a/src/gallium/drivers/nvc0/nvc0_screen.c b/src/gallium/drivers/nvc0/nvc0_screen.c
index 5a76859..b5abee3 100644
--- a/src/gallium/drivers/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nvc0/nvc0_screen.c
@@ -549,6 +549,7 @@
case 0xc0:
case 0xd0:
case 0xe0:
+ case 0xf0:
break;
default:
return NULL;
@@ -597,6 +598,9 @@
screen->base.fence.update = nvc0_screen_fence_update;
switch (dev->chipset & 0xf0) {
+ case 0xf0:
+ obj_class = NVF0_P2MF_CLASS;
+ break;
case 0xe0:
obj_class = NVE4_P2MF_CLASS;
break;
@@ -641,6 +645,9 @@
PUSH_DATA (push, screen->fence.bo->offset + 16);
switch (dev->chipset & 0xf0) {
+ case 0xf0:
+ obj_class = NVF0_3D_CLASS;
+ break;
case 0xe0:
obj_class = NVE4_3D_CLASS;
break;
diff --git a/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c b/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c
index bf99014..7e88eae 100644
--- a/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c
+++ b/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c
@@ -35,6 +35,7 @@
case 0xc0:
case 0xd0:
case 0xe0:
+ case 0xf0:
init = nvc0_screen_create;
break;
default: