i965: Make brw_reg_from_fs_reg() halve exec_size when compressed.
In a5d7e144eaf43fee37e6ff9e2de194407087632b, Connor generalized the
exec_size halving code to handle more cases. As part of this, he made
it not halve anything if the region accessed falls completely in a
single register.
Unfortunately, it started producing some invalid regions:
-add(16) g6<1>F g10<8,8,1>UW -g1<0,1,0>F { align1 compr };
-add(16) g8<1>F g12<8,8,1>UW -g1.1<0,1,0>F { align1 compr };
+add(16) g6<1>F g10<16,16,1>UW -g1<0,1,0>F { align1 compr };
+add(16) g8<1>F g12<16,16,1>UW -g1.1<0,1,0>F { align1 compr };
Here, the UW source region completely fits within a register. However,
we have to use instruction compression because the destination region
spans two registers. <16,16,1> is invalid because it's compressed.
To handle this, skip the "everything fits in one register" case and
fall through to the exec_size halving case when compressed.
Fixes hundreds of Piglit regressions on GM965.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95370
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
1 file changed