commit | e14cc504f307a7fa88c8b6757df53026aaa39b08 | [log] [tgz] |
---|---|---|
author | Tapani Pälli <tapani.palli@intel.com> | Wed Apr 02 11:46:58 2014 +0300 |
committer | Tapani Pälli <tapani.palli@intel.com> | Wed Apr 02 19:50:48 2014 +0300 |
tree | 23982c473a15ae5bd27210bc650dd832e3f93e4e | |
parent | 5dc206525b6ff799870f880469a985f3d944eb77 [diff] |
i965/vec4: do not trim dead channels on gen6 for math Do not set a writemask on Gen6 for math instructions, those are executed using align1 mode that does not support a destination mask. v2: cleanups, better comment (Matt) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76883 Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com>