| commit | e8139ef6453aa3a8da5a07be74dcb80a35f083e3 | [log] [tgz] |
|---|---|---|
| author | Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> | Wed Mar 11 20:39:36 2020 -0400 |
| committer | Marge Bot <eric+marge@anholt.net> | Thu Mar 12 12:41:08 2020 +0000 |
| tree | 6ef546d6dbce77918da16e68f874eeb1914d9134 | |
| parent | 116c541c0745b9eb6dba3ba3d2567a1fde90cf03 [diff] |
pan/bi: Add register allocator We model the machine as vector (with restrictions) to natively handle mixed types and I/O and other goodies. We use LCRA for the heavylifting. This commit adds only the modeling to feed into LCRA and spit LCRA solutions back; next commit will integrate it with the IR. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4158>