blob: dd776980a2261645e33c854ad85427aa908344f4 [file] [log] [blame]
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -04001/*
2 * Copyright (C) 2020 Collabora, Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
25 */
26
27#include <math.h>
28#include <stdio.h>
29#include "pan_encoder.h"
30#include "pan_pool.h"
31#include "pan_scoreboard.h"
32#include "pan_texture.h"
33#include "panfrost-quirks.h"
34#include "../midgard/midgard_compile.h"
35#include "compiler/nir/nir_builder.h"
36#include "util/u_math.h"
37
38/* On Midgard, the native blit infrastructure (via MFBD preloads) is broken or
39 * missing in many cases. We instead use software paths as fallbacks to
40 * implement blits, which are done as TILER jobs. No vertex shader is
41 * necessary since we can supply screen-space coordinates directly.
42 *
43 * This is primarily designed as a fallback for preloads but could be extended
44 * for other clears/blits if needed in the future. */
45
46static void
47panfrost_build_blit_shader(panfrost_program *program, unsigned gpu_id, gl_frag_result loc, nir_alu_type T, bool ms)
48{
49 bool is_colour = loc >= FRAG_RESULT_DATA0;
50
Alyssa Rosenzweigc92be292020-08-26 16:48:13 -040051 nir_builder _b;
52 nir_builder_init_simple_shader(&_b, NULL, MESA_SHADER_FRAGMENT, &midgard_nir_options);
53 nir_builder *b = &_b;
54 nir_shader *shader = b->shader;
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -040055
Icecream9590eaaad2020-09-26 12:16:02 +120056 shader->info.internal = true;
57
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -040058 nir_variable *c_src = nir_variable_create(shader, nir_var_shader_in, glsl_vector_type(GLSL_TYPE_FLOAT, 2), "coord");
59 nir_variable *c_out = nir_variable_create(shader, nir_var_shader_out, glsl_vector_type(
60 GLSL_TYPE_FLOAT, is_colour ? 4 : 1), "out");
61
62 c_src->data.location = VARYING_SLOT_TEX0;
63 c_out->data.location = loc;
64
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -040065 nir_ssa_def *coord = nir_load_var(b, c_src);
66
67 nir_tex_instr *tex = nir_tex_instr_create(shader, ms ? 3 : 1);
68
69 tex->dest_type = T;
70
71 if (ms) {
72 tex->src[0].src_type = nir_tex_src_coord;
73 tex->src[0].src = nir_src_for_ssa(nir_f2i32(b, coord));
74 tex->coord_components = 2;
75
76 tex->src[1].src_type = nir_tex_src_ms_index;
77 tex->src[1].src = nir_src_for_ssa(nir_load_sample_id(b));
78
79 tex->src[2].src_type = nir_tex_src_lod;
80 tex->src[2].src = nir_src_for_ssa(nir_imm_int(b, 0));
81 tex->sampler_dim = GLSL_SAMPLER_DIM_MS;
82 tex->op = nir_texop_txf_ms;
83 } else {
84 tex->op = nir_texop_tex;
85
86 tex->src[0].src_type = nir_tex_src_coord;
87 tex->src[0].src = nir_src_for_ssa(coord);
88 tex->coord_components = 2;
89
90 tex->sampler_dim = GLSL_SAMPLER_DIM_2D;
91 }
92
93 nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL);
94 nir_builder_instr_insert(b, &tex->instr);
95
96 if (is_colour)
97 nir_store_var(b, c_out, &tex->dest.ssa, 0xFF);
98 else
99 nir_store_var(b, c_out, nir_channel(b, &tex->dest.ssa, 0), 0xFF);
100
Icecream95756441b2020-09-26 12:19:14 +1200101 midgard_compile_shader_nir(shader, program, false, 0, gpu_id, false);
Alyssa Rosenzweigda6d0e32020-08-18 08:10:25 -0400102 ralloc_free(shader);
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400103}
104
105/* Compile and upload all possible blit shaders ahead-of-time to reduce draw
106 * time overhead. There's only ~30 of them at the moment, so this is fine */
107
108void
109panfrost_init_blit_shaders(struct panfrost_device *dev)
110{
111 static const struct {
112 gl_frag_result loc;
113 unsigned types;
114 } shader_descs[] = {
115 { FRAG_RESULT_DEPTH, 1 << PAN_BLIT_FLOAT },
116 { FRAG_RESULT_STENCIL, 1 << PAN_BLIT_UINT },
117 { FRAG_RESULT_DATA0, ~0 },
118 { FRAG_RESULT_DATA1, ~0 },
119 { FRAG_RESULT_DATA2, ~0 },
120 { FRAG_RESULT_DATA3, ~0 },
121 { FRAG_RESULT_DATA4, ~0 },
122 { FRAG_RESULT_DATA5, ~0 },
123 { FRAG_RESULT_DATA6, ~0 },
124 { FRAG_RESULT_DATA7, ~0 }
125 };
126
127 nir_alu_type nir_types[PAN_BLIT_NUM_TYPES] = {
128 nir_type_float,
129 nir_type_uint,
130 nir_type_int
131 };
132
133 /* Total size = # of shaders * bytes per shader. There are
134 * shaders for each RT (so up to DATA7 -- overestimate is
135 * okay) and up to NUM_TYPES variants of each, * 2 for multisampling
136 * variants. These shaders are simple enough that they should be less
137 * than 8 quadwords each (again, overestimate is fine). */
138
139 unsigned offset = 0;
140 unsigned total_size = (FRAG_RESULT_DATA7 * PAN_BLIT_NUM_TYPES)
141 * (8 * 16) * 2;
142
143 dev->blit_shaders.bo = panfrost_bo_create(dev, total_size, PAN_BO_EXECUTE);
144
145 /* Don't bother generating multisampling variants if we don't actually
146 * support multisampling */
147 bool has_ms = !(dev->quirks & MIDGARD_SFBD);
148
149 for (unsigned ms = 0; ms <= has_ms; ++ms) {
150 for (unsigned i = 0; i < ARRAY_SIZE(shader_descs); ++i) {
151 unsigned loc = shader_descs[i].loc;
152
153 for (enum pan_blit_type T = 0; T < PAN_BLIT_NUM_TYPES; ++T) {
154 if (!(shader_descs[i].types & (1 << T)))
155 continue;
156
157 panfrost_program program;
158 panfrost_build_blit_shader(&program, dev->gpu_id, loc,
159 nir_types[T], ms);
160
161 assert(offset + program.compiled.size < total_size);
162 memcpy(dev->blit_shaders.bo->cpu + offset, program.compiled.data, program.compiled.size);
163
164 dev->blit_shaders.loads[loc][T][ms] = (dev->blit_shaders.bo->gpu + offset) | program.first_tag;
165 offset += ALIGN_POT(program.compiled.size, 64);
166 util_dynarray_fini(&program.compiled);
167 }
168 }
169 }
170}
171
172/* Add a shader-based load on Midgard (draw-time for GL). Shaders are
173 * precached */
174
175void
176panfrost_load_midg(
177 struct pan_pool *pool,
178 struct pan_scoreboard *scoreboard,
179 mali_ptr blend_shader,
180 mali_ptr fbd,
181 mali_ptr coordinates, unsigned vertex_count,
182 struct pan_image *image,
183 unsigned loc)
184{
Alyssa Rosenzweig5b3b2a62020-08-21 16:22:10 -0400185 bool srgb = util_format_is_srgb(image->format);
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400186 unsigned width = u_minify(image->width0, image->first_level);
187 unsigned height = u_minify(image->height0, image->first_level);
188
Alyssa Rosenzweig7f487e02020-08-05 19:33:20 -0400189 struct panfrost_transfer viewport = panfrost_pool_alloc(pool, MALI_VIEWPORT_LENGTH);
Alyssa Rosenzweigf74186b2020-08-11 18:23:12 -0400190 struct panfrost_transfer sampler = panfrost_pool_alloc(pool, MALI_MIDGARD_SAMPLER_LENGTH);
Alyssa Rosenzweig4fc90f72020-08-13 16:06:12 -0400191 struct panfrost_transfer varying = panfrost_pool_alloc(pool, MALI_ATTRIBUTE_LENGTH);
192 struct panfrost_transfer varying_buffer = panfrost_pool_alloc(pool, MALI_ATTRIBUTE_BUFFER_LENGTH);
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400193
Alyssa Rosenzweig7f487e02020-08-05 19:33:20 -0400194 pan_pack(viewport.cpu, VIEWPORT, cfg) {
195 cfg.scissor_maximum_x = width - 1; /* Inclusive */
196 cfg.scissor_maximum_y = height - 1;
197 }
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400198
Alyssa Rosenzweig4fc90f72020-08-13 16:06:12 -0400199 pan_pack(varying_buffer.cpu, ATTRIBUTE_BUFFER, cfg) {
200 cfg.pointer = coordinates;
201 cfg.stride = 4 * sizeof(float);
202 cfg.size = cfg.stride * vertex_count;
203 }
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400204
Alyssa Rosenzweig4fc90f72020-08-13 16:06:12 -0400205 pan_pack(varying.cpu, ATTRIBUTE, cfg) {
Alyssa Rosenzweig2c8a7222020-08-13 13:27:16 -0400206 cfg.buffer_index = 0;
207 cfg.format = (MALI_CHANNEL_R << 0) | (MALI_CHANNEL_G << 3) | (MALI_RGBA32F << 12);
208 }
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400209
Alyssa Rosenzweigbf6d5482020-08-18 18:15:45 -0400210 struct mali_blend_equation_packed eq;
211
212 pan_pack(&eq, BLEND_EQUATION, cfg) {
213 cfg.rgb_mode = 0x122;
214 cfg.alpha_mode = 0x122;
215
216 if (loc < FRAG_RESULT_DATA0)
217 cfg.color_mask = 0x0;
218 }
219
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400220 union midgard_blend replace = {
Alyssa Rosenzweigbf6d5482020-08-18 18:15:45 -0400221 .equation = eq
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400222 };
223
224 if (blend_shader)
225 replace.shader = blend_shader;
226
227 /* Determine the sampler type needed. Stencil is always sampled as
228 * UINT. Pure (U)INT is always (U)INT. Everything else is FLOAT. */
229
230 enum pan_blit_type T =
231 (loc == FRAG_RESULT_STENCIL) ? PAN_BLIT_UINT :
232 (util_format_is_pure_uint(image->format)) ? PAN_BLIT_UINT :
233 (util_format_is_pure_sint(image->format)) ? PAN_BLIT_INT :
234 PAN_BLIT_FLOAT;
235
236 bool ms = image->nr_samples > 1;
237
Alyssa Rosenzweig5b3b2a62020-08-21 16:22:10 -0400238 struct mali_midgard_properties_packed properties;
Alyssa Rosenzweig661b4692020-08-21 10:34:06 -0400239
Alyssa Rosenzweig5b3b2a62020-08-21 16:22:10 -0400240 struct panfrost_transfer shader_meta_t = panfrost_pool_alloc_aligned(
241 pool, MALI_STATE_LENGTH + 8 * sizeof(struct midgard_blend_rt), 128);
Alyssa Rosenzweig661b4692020-08-21 10:34:06 -0400242
Alyssa Rosenzweig5b3b2a62020-08-21 16:22:10 -0400243 pan_pack(&properties, MIDGARD_PROPERTIES, cfg) {
Alyssa Rosenzweig1b7d4f12020-08-20 16:25:14 -0400244 cfg.work_register_count = 4;
245 cfg.early_z_enable = (loc >= FRAG_RESULT_DATA0);
246 cfg.stencil_from_shader = (loc == FRAG_RESULT_STENCIL);
247 cfg.depth_source = (loc == FRAG_RESULT_DEPTH) ?
248 MALI_DEPTH_SOURCE_SHADER :
249 MALI_DEPTH_SOURCE_FIXED_FUNCTION;
250 }
251
Alyssa Rosenzweig5b3b2a62020-08-21 16:22:10 -0400252 pan_pack(shader_meta_t.cpu, STATE, cfg) {
253 cfg.shader.shader = pool->dev->blit_shaders.loads[loc][T][ms];
254 cfg.shader.varying_count = 1;
255 cfg.shader.texture_count = 1;
256 cfg.shader.sampler_count = 1;
Alyssa Rosenzweig1b7d4f12020-08-20 16:25:14 -0400257
Alyssa Rosenzweig5b3b2a62020-08-21 16:22:10 -0400258 cfg.properties = properties.opaque[0];
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400259
Alyssa Rosenzweig5b3b2a62020-08-21 16:22:10 -0400260 cfg.multisample_misc.sample_mask = 0xFFFF;
261 cfg.multisample_misc.multisample_enable = ms;
262 cfg.multisample_misc.evaluate_per_sample = ms;
263 cfg.multisample_misc.depth_write_mask = (loc == FRAG_RESULT_DEPTH);
264 cfg.multisample_misc.depth_function = MALI_FUNC_ALWAYS;
265
266 cfg.stencil_mask_misc.stencil_enable = (loc == FRAG_RESULT_STENCIL);
267 cfg.stencil_mask_misc.stencil_mask_front = 0xFF;
268 cfg.stencil_mask_misc.stencil_mask_back = 0xFF;
269 cfg.stencil_mask_misc.unknown_1 = 0x7;
270
271 cfg.stencil_front.compare_function = MALI_FUNC_ALWAYS;
272 cfg.stencil_front.stencil_fail = MALI_STENCIL_OP_REPLACE;
273 cfg.stencil_front.depth_fail = MALI_STENCIL_OP_REPLACE;
274 cfg.stencil_front.depth_pass = MALI_STENCIL_OP_REPLACE;
Alyssa Rosenzweig322ddbd2020-09-09 16:29:04 -0400275 cfg.stencil_front.mask = 0xFF;
Alyssa Rosenzweig5b3b2a62020-08-21 16:22:10 -0400276
277 cfg.stencil_back = cfg.stencil_front;
278
279 if (pool->dev->quirks & MIDGARD_SFBD) {
280 cfg.stencil_mask_misc.sfbd_write_enable = true;
281 cfg.stencil_mask_misc.sfbd_dither_disable = true;
282 cfg.stencil_mask_misc.sfbd_srgb = srgb;
283 cfg.multisample_misc.sfbd_blend_shader = blend_shader;
284 memcpy(&cfg.sfbd_blend, &replace, sizeof(replace));
285 } else if (!(pool->dev->quirks & IS_BIFROST)) {
286 memcpy(&cfg.sfbd_blend, &blend_shader, sizeof(blend_shader));
287 }
288
289 assert(cfg.shader.shader);
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400290 }
291
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400292 /* Create the texture descriptor. We partially compute the base address
293 * ourselves to account for layer, such that the texture descriptor
294 * itself is for a 2D texture with array size 1 even for 3D/array
295 * textures, removing the need to separately key the blit shaders for
296 * 2D and 3D variants */
297
Alyssa Rosenzweig373a2042020-08-17 14:27:57 -0400298 struct panfrost_transfer texture_t = panfrost_pool_alloc_aligned(
299 pool, MALI_MIDGARD_TEXTURE_LENGTH + sizeof(mali_ptr) * 2 * MAX2(image->nr_samples, 1), 128);
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400300
301 panfrost_new_texture(texture_t.cpu,
302 image->width0, image->height0,
303 MAX2(image->nr_samples, 1), 1,
Alyssa Rosenzweigf008a632020-08-11 17:27:36 -0400304 image->format, MALI_TEXTURE_DIMENSION_2D,
Alyssa Rosenzweig965537df2020-07-22 10:23:50 -0400305 image->modifier,
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400306 image->first_level, image->last_level,
307 0, 0,
308 image->nr_samples,
309 0,
Alyssa Rosenzweigcdc32762020-08-12 16:46:07 -0400310 (MALI_CHANNEL_R << 0) | (MALI_CHANNEL_G << 3) | (MALI_CHANNEL_B << 6) | (MALI_CHANNEL_A << 9),
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400311 image->bo->gpu + image->first_layer *
312 panfrost_get_layer_stride(image->slices,
Alyssa Rosenzweigf008a632020-08-11 17:27:36 -0400313 image->dim == MALI_TEXTURE_DIMENSION_3D,
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400314 image->cubemap_stride, image->first_level),
315 image->slices);
316
Alyssa Rosenzweigf74186b2020-08-11 18:23:12 -0400317 pan_pack(sampler.cpu, MIDGARD_SAMPLER, cfg)
318 cfg.normalized_coordinates = false;
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400319
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400320 for (unsigned i = 0; i < 8; ++i) {
Alyssa Rosenzweig5b3b2a62020-08-21 16:22:10 -0400321 void *dest = shader_meta_t.cpu + MALI_STATE_LENGTH + sizeof(struct midgard_blend_rt) * i;
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400322
323 if (loc == (FRAG_RESULT_DATA0 + i)) {
324 struct midgard_blend_rt blend_rt = {
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400325 .blend = replace,
326 };
327
Alyssa Rosenzweig94c9f872020-08-18 17:06:01 -0400328 unsigned flags = 0;
329 pan_pack(&flags, BLEND_FLAGS, cfg) {
Boris Brezillon54d716a2020-09-08 12:48:15 +0200330 cfg.round_to_fb_precision = true;
Alyssa Rosenzweig5b3b2a62020-08-21 16:22:10 -0400331 cfg.srgb = srgb;
Alyssa Rosenzweig94c9f872020-08-18 17:06:01 -0400332 cfg.midgard_blend_shader = blend_shader;
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400333 }
Alyssa Rosenzweig94c9f872020-08-18 17:06:01 -0400334 blend_rt.flags.opaque[0] = flags;
335
336 if (blend_shader)
337 blend_rt.blend.shader = blend_shader;
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400338
339 memcpy(dest, &blend_rt, sizeof(struct midgard_blend_rt));
340 } else {
341 memset(dest, 0x0, sizeof(struct midgard_blend_rt));
342 }
343 }
344
Boris Brezillon6b923032020-09-08 20:32:41 +0200345 struct panfrost_transfer t =
346 panfrost_pool_alloc_aligned(pool, MALI_MIDGARD_TILER_JOB_LENGTH, 64);
Alyssa Rosenzweig59b6e3c2020-08-24 13:46:34 -0400347
Boris Brezillon6b923032020-09-08 20:32:41 +0200348 pan_section_pack(t.cpu, MIDGARD_TILER_JOB, DRAW, cfg) {
Boris Brezillond343f232020-09-29 10:45:23 +0200349 cfg.four_components_per_vertex = true;
350 cfg.draw_descriptor_is_64b = true;
351 cfg.texture_descriptor_is_64b = true;
Alyssa Rosenzweig59b6e3c2020-08-24 13:46:34 -0400352 cfg.position = coordinates;
353 cfg.textures = panfrost_pool_upload(pool, &texture_t.gpu, sizeof(texture_t.gpu));
354 cfg.samplers = sampler.gpu;
355 cfg.state = shader_meta_t.gpu;
356 cfg.varying_buffers = varying_buffer.gpu;
357 cfg.varyings = varying.gpu;
358 cfg.viewport = viewport.gpu;
Boris Brezillond343f232020-09-29 10:45:23 +0200359 cfg.fbd = fbd;
Alyssa Rosenzweig59b6e3c2020-08-24 13:46:34 -0400360 }
361
Boris Brezillon6b923032020-09-08 20:32:41 +0200362 pan_section_pack(t.cpu, MIDGARD_TILER_JOB, PRIMITIVE, cfg) {
Alyssa Rosenzweigb60d5672020-08-25 16:59:14 -0400363 cfg.draw_mode = MALI_DRAW_MODE_TRIANGLES;
364 cfg.index_count = vertex_count;
Boris Brezillon51331d62020-09-29 11:21:33 +0200365 cfg.job_task_split = 6;
Alyssa Rosenzweigb60d5672020-08-25 16:59:14 -0400366 }
367
Boris Brezillon6b923032020-09-08 20:32:41 +0200368 panfrost_pack_work_groups_compute(pan_section_ptr(t.cpu, MIDGARD_TILER_JOB, INVOCATION),
Boris Brezillond2892092020-09-08 19:41:51 +0200369 1, vertex_count, 1, 1, 1, 1, true);
Alyssa Rosenzweig59b6e3c2020-08-24 13:46:34 -0400370
Boris Brezillon6b923032020-09-08 20:32:41 +0200371 panfrost_add_job(pool, scoreboard, MALI_JOB_TYPE_TILER, false, 0, &t, true);
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -0400372}