Ian Romanick | aa1a5c0 | 2015-08-19 19:24:45 -0700 | [diff] [blame] | 1 | /* |
José Fonseca | 8771285 | 2014-01-17 16:27:50 +0000 | [diff] [blame] | 2 | * Copyright 2003 VMware, Inc. |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 3 | * All Rights Reserved. |
Kenneth Graunke | a7bdd4c | 2013-11-25 15:46:34 -0800 | [diff] [blame] | 4 | * |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the |
| 7 | * "Software"), to deal in the Software without restriction, including |
| 8 | * without limitation the rights to use, copy, modify, merge, publish, |
Ian Romanick | 284dcad | 2015-08-19 16:36:35 -0700 | [diff] [blame] | 9 | * distribute, sublicense, and/or sell copies of the Software, and to |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 10 | * permit persons to whom the Software is furnished to do so, subject to |
| 11 | * the following conditions: |
Kenneth Graunke | a7bdd4c | 2013-11-25 15:46:34 -0800 | [diff] [blame] | 12 | * |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 13 | * The above copyright notice and this permission notice (including the |
| 14 | * next paragraph) shall be included in all copies or substantial portions |
| 15 | * of the Software. |
Kenneth Graunke | a7bdd4c | 2013-11-25 15:46:34 -0800 | [diff] [blame] | 16 | * |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| 18 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
Ian Romanick | 284dcad | 2015-08-19 16:36:35 -0700 | [diff] [blame] | 19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
José Fonseca | 8771285 | 2014-01-17 16:27:50 +0000 | [diff] [blame] | 20 | * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 21 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 22 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 23 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
Ian Romanick | aa1a5c0 | 2015-08-19 19:24:45 -0700 | [diff] [blame] | 24 | */ |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 25 | |
Brian Paul | ecadb51 | 2008-09-18 15:17:05 -0600 | [diff] [blame] | 26 | #include "main/mtypes.h" |
Anuj Phogat | 412c8c8 | 2015-04-14 22:06:49 -0700 | [diff] [blame] | 27 | #include "main/blit.h" |
Brian Paul | ecadb51 | 2008-09-18 15:17:05 -0600 | [diff] [blame] | 28 | #include "main/context.h" |
| 29 | #include "main/enums.h" |
Paul Berry | c738ea1 | 2012-07-18 12:54:48 -0700 | [diff] [blame] | 30 | #include "main/fbobject.h" |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 31 | |
Kenneth Graunke | a692744 | 2013-07-02 18:56:43 -0700 | [diff] [blame] | 32 | #include "brw_context.h" |
Eric Anholt | 66524da | 2013-12-23 01:48:09 -0800 | [diff] [blame] | 33 | #include "brw_defines.h" |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 34 | #include "intel_blit.h" |
| 35 | #include "intel_buffers.h" |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 36 | #include "intel_fbo.h" |
Eric Anholt | 35fd727 | 2008-09-08 08:52:48 -0700 | [diff] [blame] | 37 | #include "intel_batchbuffer.h" |
Eric Anholt | 290a114 | 2010-12-15 12:10:03 -0800 | [diff] [blame] | 38 | #include "intel_mipmap_tree.h" |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 39 | |
| 40 | #define FILE_DEBUG_FLAG DEBUG_BLIT |
| 41 | |
Eric Anholt | 815dce9 | 2013-06-03 22:55:39 -0700 | [diff] [blame] | 42 | static void |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 43 | intel_miptree_set_alpha_to_one(struct brw_context *brw, |
Eric Anholt | 815dce9 | 2013-06-03 22:55:39 -0700 | [diff] [blame] | 44 | struct intel_mipmap_tree *mt, |
| 45 | int x, int y, int width, int height); |
| 46 | |
Keith Whitwell | f332da5 | 2006-11-21 14:43:30 +0000 | [diff] [blame] | 47 | static GLuint translate_raster_op(GLenum logicop) |
| 48 | { |
| 49 | switch(logicop) { |
| 50 | case GL_CLEAR: return 0x00; |
| 51 | case GL_AND: return 0x88; |
| 52 | case GL_AND_REVERSE: return 0x44; |
| 53 | case GL_COPY: return 0xCC; |
| 54 | case GL_AND_INVERTED: return 0x22; |
| 55 | case GL_NOOP: return 0xAA; |
| 56 | case GL_XOR: return 0x66; |
| 57 | case GL_OR: return 0xEE; |
| 58 | case GL_NOR: return 0x11; |
| 59 | case GL_EQUIV: return 0x99; |
| 60 | case GL_INVERT: return 0x55; |
| 61 | case GL_OR_REVERSE: return 0xDD; |
| 62 | case GL_COPY_INVERTED: return 0x33; |
| 63 | case GL_OR_INVERTED: return 0xBB; |
| 64 | case GL_NAND: return 0x77; |
| 65 | case GL_SET: return 0xFF; |
| 66 | default: return 0; |
| 67 | } |
| 68 | } |
| 69 | |
Eric Anholt | 6383428 | 2010-05-25 11:45:05 -0700 | [diff] [blame] | 70 | static uint32_t |
| 71 | br13_for_cpp(int cpp) |
| 72 | { |
| 73 | switch (cpp) { |
Anuj Phogat | 412c8c8 | 2015-04-14 22:06:49 -0700 | [diff] [blame] | 74 | case 16: |
| 75 | return BR13_32323232; |
| 76 | case 8: |
| 77 | return BR13_16161616; |
Eric Anholt | 6383428 | 2010-05-25 11:45:05 -0700 | [diff] [blame] | 78 | case 4: |
| 79 | return BR13_8888; |
Eric Anholt | 6383428 | 2010-05-25 11:45:05 -0700 | [diff] [blame] | 80 | case 2: |
| 81 | return BR13_565; |
Eric Anholt | 6383428 | 2010-05-25 11:45:05 -0700 | [diff] [blame] | 82 | case 1: |
| 83 | return BR13_8; |
Eric Anholt | 6383428 | 2010-05-25 11:45:05 -0700 | [diff] [blame] | 84 | default: |
Matt Turner | 3d82672 | 2014-06-29 14:54:01 -0700 | [diff] [blame] | 85 | unreachable("not reached"); |
Eric Anholt | 6383428 | 2010-05-25 11:45:05 -0700 | [diff] [blame] | 86 | } |
| 87 | } |
Keith Whitwell | f332da5 | 2006-11-21 14:43:30 +0000 | [diff] [blame] | 88 | |
Eric Anholt | 6a7c277 | 2013-02-04 14:24:09 -0800 | [diff] [blame] | 89 | /** |
Eric Anholt | 78c2fc5 | 2013-06-03 16:49:40 -0700 | [diff] [blame] | 90 | * Emits the packet for switching the blitter from X to Y tiled or back. |
| 91 | * |
| 92 | * This has to be called in a single BEGIN_BATCH_BLT_TILED() / |
| 93 | * ADVANCE_BATCH_TILED(). This is because BCS_SWCTRL is saved and restored as |
| 94 | * part of the power context, not a render context, and if the batchbuffer was |
| 95 | * to get flushed between setting and blitting, or blitting and restoring, our |
| 96 | * tiling state would leak into other unsuspecting applications (like the X |
| 97 | * server). |
| 98 | */ |
Matt Turner | f11c6f0 | 2015-07-08 19:00:48 -0700 | [diff] [blame] | 99 | static uint32_t * |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 100 | set_blitter_tiling(struct brw_context *brw, |
Matt Turner | f11c6f0 | 2015-07-08 19:00:48 -0700 | [diff] [blame] | 101 | bool dst_y_tiled, bool src_y_tiled, |
| 102 | uint32_t *__map) |
Eric Anholt | 78c2fc5 | 2013-06-03 16:49:40 -0700 | [diff] [blame] | 103 | { |
Kenneth Graunke | 53631be | 2013-07-06 00:36:46 -0700 | [diff] [blame] | 104 | assert(brw->gen >= 6); |
Eric Anholt | 78c2fc5 | 2013-06-03 16:49:40 -0700 | [diff] [blame] | 105 | |
| 106 | /* Idle the blitter before we update how tiling is interpreted. */ |
| 107 | OUT_BATCH(MI_FLUSH_DW); |
| 108 | OUT_BATCH(0); |
| 109 | OUT_BATCH(0); |
| 110 | OUT_BATCH(0); |
| 111 | |
| 112 | OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2)); |
| 113 | OUT_BATCH(BCS_SWCTRL); |
| 114 | OUT_BATCH((BCS_SWCTRL_DST_Y | BCS_SWCTRL_SRC_Y) << 16 | |
| 115 | (dst_y_tiled ? BCS_SWCTRL_DST_Y : 0) | |
| 116 | (src_y_tiled ? BCS_SWCTRL_SRC_Y : 0)); |
Matt Turner | f11c6f0 | 2015-07-08 19:00:48 -0700 | [diff] [blame] | 117 | return __map; |
Eric Anholt | 78c2fc5 | 2013-06-03 16:49:40 -0700 | [diff] [blame] | 118 | } |
Matt Turner | f11c6f0 | 2015-07-08 19:00:48 -0700 | [diff] [blame] | 119 | #define SET_BLITTER_TILING(...) __map = set_blitter_tiling(__VA_ARGS__, __map) |
Eric Anholt | 78c2fc5 | 2013-06-03 16:49:40 -0700 | [diff] [blame] | 120 | |
Matt Turner | f11c6f0 | 2015-07-08 19:00:48 -0700 | [diff] [blame] | 121 | #define BEGIN_BATCH_BLT_TILED(n, dst_y_tiled, src_y_tiled) \ |
Eric Anholt | 78c2fc5 | 2013-06-03 16:49:40 -0700 | [diff] [blame] | 122 | BEGIN_BATCH_BLT(n + ((dst_y_tiled || src_y_tiled) ? 14 : 0)); \ |
| 123 | if (dst_y_tiled || src_y_tiled) \ |
Matt Turner | f11c6f0 | 2015-07-08 19:00:48 -0700 | [diff] [blame] | 124 | SET_BLITTER_TILING(brw, dst_y_tiled, src_y_tiled) |
Eric Anholt | 78c2fc5 | 2013-06-03 16:49:40 -0700 | [diff] [blame] | 125 | |
Matt Turner | f11c6f0 | 2015-07-08 19:00:48 -0700 | [diff] [blame] | 126 | #define ADVANCE_BATCH_TILED(dst_y_tiled, src_y_tiled) \ |
Eric Anholt | 78c2fc5 | 2013-06-03 16:49:40 -0700 | [diff] [blame] | 127 | if (dst_y_tiled || src_y_tiled) \ |
Matt Turner | f11c6f0 | 2015-07-08 19:00:48 -0700 | [diff] [blame] | 128 | SET_BLITTER_TILING(brw, false, false); \ |
| 129 | ADVANCE_BATCH() |
Eric Anholt | 78c2fc5 | 2013-06-03 16:49:40 -0700 | [diff] [blame] | 130 | |
Chris Wilson | 8da79b8 | 2015-06-05 13:49:08 +0100 | [diff] [blame] | 131 | static int |
| 132 | blt_pitch(struct intel_mipmap_tree *mt) |
| 133 | { |
Topi Pohjolainen | b95caac | 2017-06-22 15:54:04 +0300 | [diff] [blame] | 134 | int pitch = mt->surf.row_pitch; |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 135 | if (mt->surf.tiling != ISL_TILING_LINEAR) |
Chris Wilson | 8da79b8 | 2015-06-05 13:49:08 +0100 | [diff] [blame] | 136 | pitch /= 4; |
| 137 | return pitch; |
| 138 | } |
| 139 | |
Chris Wilson | 922c0c9 | 2015-06-05 14:45:18 +0100 | [diff] [blame] | 140 | bool |
| 141 | intel_miptree_blit_compatible_formats(mesa_format src, mesa_format dst) |
Chris Wilson | c2d0606 | 2015-06-05 14:33:36 +0100 | [diff] [blame] | 142 | { |
| 143 | /* The BLT doesn't handle sRGB conversion */ |
| 144 | assert(src == _mesa_get_srgb_format_linear(src)); |
| 145 | assert(dst == _mesa_get_srgb_format_linear(dst)); |
| 146 | |
| 147 | /* No swizzle or format conversions possible, except... */ |
| 148 | if (src == dst) |
| 149 | return true; |
| 150 | |
| 151 | /* ...we can either discard the alpha channel when going from A->X, |
| 152 | * or we can fill the alpha channel with 0xff when going from X->A |
| 153 | */ |
| 154 | if (src == MESA_FORMAT_B8G8R8A8_UNORM || src == MESA_FORMAT_B8G8R8X8_UNORM) |
| 155 | return (dst == MESA_FORMAT_B8G8R8A8_UNORM || |
| 156 | dst == MESA_FORMAT_B8G8R8X8_UNORM); |
| 157 | |
| 158 | if (src == MESA_FORMAT_R8G8B8A8_UNORM || src == MESA_FORMAT_R8G8B8X8_UNORM) |
| 159 | return (dst == MESA_FORMAT_R8G8B8A8_UNORM || |
| 160 | dst == MESA_FORMAT_R8G8B8X8_UNORM); |
| 161 | |
| 162 | return false; |
| 163 | } |
| 164 | |
Jason Ekstrand | b7979a8 | 2016-10-24 14:57:21 -0700 | [diff] [blame] | 165 | static void |
| 166 | get_blit_intratile_offset_el(const struct brw_context *brw, |
| 167 | struct intel_mipmap_tree *mt, |
| 168 | uint32_t total_x_offset_el, |
| 169 | uint32_t total_y_offset_el, |
| 170 | uint32_t *base_address_offset, |
| 171 | uint32_t *x_offset_el, |
| 172 | uint32_t *y_offset_el) |
| 173 | { |
Topi Pohjolainen | bf24c35 | 2017-06-20 21:20:15 +0300 | [diff] [blame] | 174 | isl_tiling_get_intratile_offset_el(mt->surf.tiling, |
| 175 | mt->cpp * 8, mt->surf.row_pitch, |
Jason Ekstrand | b7979a8 | 2016-10-24 14:57:21 -0700 | [diff] [blame] | 176 | total_x_offset_el, total_y_offset_el, |
| 177 | base_address_offset, |
| 178 | x_offset_el, y_offset_el); |
Topi Pohjolainen | bf24c35 | 2017-06-20 21:20:15 +0300 | [diff] [blame] | 179 | if (mt->surf.tiling == ISL_TILING_LINEAR) { |
Jason Ekstrand | b7979a8 | 2016-10-24 14:57:21 -0700 | [diff] [blame] | 180 | /* From the Broadwell PRM docs for XY_SRC_COPY_BLT::SourceBaseAddress: |
| 181 | * |
| 182 | * "Base address of the destination surface: X=0, Y=0. Lower 32bits |
| 183 | * of the 48bit addressing. When Src Tiling is enabled (Bit_15 |
| 184 | * enabled), this address must be 4KB-aligned. When Tiling is not |
| 185 | * enabled, this address should be CL (64byte) aligned." |
| 186 | * |
| 187 | * The offsets we get from ISL in the tiled case are already aligned. |
| 188 | * In the linear case, we need to do some of our own aligning. |
| 189 | */ |
Jason Ekstrand | b7979a8 | 2016-10-24 14:57:21 -0700 | [diff] [blame] | 190 | uint32_t delta = *base_address_offset & 63; |
| 191 | assert(delta % mt->cpp == 0); |
| 192 | *base_address_offset -= delta; |
| 193 | *x_offset_el += delta / mt->cpp; |
| 194 | } else { |
| 195 | assert(*base_address_offset % 4096 == 0); |
| 196 | } |
| 197 | } |
| 198 | |
Jason Ekstrand | 6c74e7f | 2016-11-30 18:14:27 -0800 | [diff] [blame] | 199 | static bool |
| 200 | emit_miptree_blit(struct brw_context *brw, |
| 201 | struct intel_mipmap_tree *src_mt, |
| 202 | uint32_t src_x, uint32_t src_y, |
| 203 | struct intel_mipmap_tree *dst_mt, |
| 204 | uint32_t dst_x, uint32_t dst_y, |
| 205 | uint32_t width, uint32_t height, |
| 206 | bool reverse, GLenum logicop) |
| 207 | { |
| 208 | /* According to the Ivy Bridge PRM, Vol1 Part4, section 1.2.1.2 (Graphics |
| 209 | * Data Size Limitations): |
| 210 | * |
| 211 | * The BLT engine is capable of transferring very large quantities of |
| 212 | * graphics data. Any graphics data read from and written to the |
| 213 | * destination is permitted to represent a number of pixels that |
| 214 | * occupies up to 65,536 scan lines and up to 32,768 bytes per scan line |
| 215 | * at the destination. The maximum number of pixels that may be |
| 216 | * represented per scan line’s worth of graphics data depends on the |
| 217 | * color depth. |
| 218 | * |
Kenneth Graunke | f8f7ea5 | 2017-01-22 01:44:08 -0800 | [diff] [blame] | 219 | * The blitter's pitch is a signed 16-bit integer, but measured in bytes |
| 220 | * for linear surfaces and DWords for tiled surfaces. So the maximum |
| 221 | * pitch is 32k linear and 128k tiled. |
Jason Ekstrand | 6c74e7f | 2016-11-30 18:14:27 -0800 | [diff] [blame] | 222 | */ |
| 223 | if (blt_pitch(src_mt) >= 32768 || blt_pitch(dst_mt) >= 32768) { |
| 224 | perf_debug("Falling back due to >= 32k/128k pitch\n"); |
| 225 | return false; |
| 226 | } |
| 227 | |
| 228 | /* We need to split the blit into chunks that each fit within the blitter's |
| 229 | * restrictions. We can't use a chunk size of 32768 because we need to |
| 230 | * ensure that src_tile_x + chunk_size fits. We choose 16384 because it's |
| 231 | * a nice round power of two, big enough that performance won't suffer, and |
| 232 | * small enough to guarantee everything fits. |
| 233 | */ |
| 234 | const uint32_t max_chunk_size = 16384; |
| 235 | |
| 236 | for (uint32_t chunk_x = 0; chunk_x < width; chunk_x += max_chunk_size) { |
| 237 | for (uint32_t chunk_y = 0; chunk_y < height; chunk_y += max_chunk_size) { |
| 238 | const uint32_t chunk_w = MIN2(max_chunk_size, width - chunk_x); |
| 239 | const uint32_t chunk_h = MIN2(max_chunk_size, height - chunk_y); |
| 240 | |
| 241 | uint32_t src_offset, src_tile_x, src_tile_y; |
| 242 | get_blit_intratile_offset_el(brw, src_mt, |
| 243 | src_x + chunk_x, src_y + chunk_y, |
| 244 | &src_offset, &src_tile_x, &src_tile_y); |
| 245 | |
| 246 | uint32_t dst_offset, dst_tile_x, dst_tile_y; |
| 247 | get_blit_intratile_offset_el(brw, dst_mt, |
| 248 | dst_x + chunk_x, dst_y + chunk_y, |
| 249 | &dst_offset, &dst_tile_x, &dst_tile_y); |
| 250 | |
| 251 | if (!intelEmitCopyBlit(brw, |
| 252 | src_mt->cpp, |
Topi Pohjolainen | b95caac | 2017-06-22 15:54:04 +0300 | [diff] [blame] | 253 | reverse ? -src_mt->surf.row_pitch : |
| 254 | src_mt->surf.row_pitch, |
Jason Ekstrand | 6c74e7f | 2016-11-30 18:14:27 -0800 | [diff] [blame] | 255 | src_mt->bo, src_mt->offset + src_offset, |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 256 | src_mt->surf.tiling, |
Topi Pohjolainen | b95caac | 2017-06-22 15:54:04 +0300 | [diff] [blame] | 257 | dst_mt->surf.row_pitch, |
Jason Ekstrand | 6c74e7f | 2016-11-30 18:14:27 -0800 | [diff] [blame] | 258 | dst_mt->bo, dst_mt->offset + dst_offset, |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 259 | dst_mt->surf.tiling, |
Jason Ekstrand | 6c74e7f | 2016-11-30 18:14:27 -0800 | [diff] [blame] | 260 | src_tile_x, src_tile_y, |
| 261 | dst_tile_x, dst_tile_y, |
| 262 | chunk_w, chunk_h, |
| 263 | logicop)) { |
| 264 | /* If this is ever going to fail, it will fail on the first chunk */ |
| 265 | assert(chunk_x == 0 && chunk_y == 0); |
| 266 | return false; |
| 267 | } |
| 268 | } |
| 269 | } |
| 270 | |
| 271 | return true; |
| 272 | } |
| 273 | |
Eric Anholt | 78c2fc5 | 2013-06-03 16:49:40 -0700 | [diff] [blame] | 274 | /** |
Eric Anholt | 6a7c277 | 2013-02-04 14:24:09 -0800 | [diff] [blame] | 275 | * Implements a rectangular block transfer (blit) of pixels between two |
| 276 | * miptrees. |
| 277 | * |
| 278 | * Our blitter can operate on 1, 2, or 4-byte-per-pixel data, with generous, |
| 279 | * but limited, pitches and sizes allowed. |
| 280 | * |
| 281 | * The src/dst coordinates are relative to the given level/slice of the |
| 282 | * miptree. |
| 283 | * |
| 284 | * If @src_flip or @dst_flip is set, then the rectangle within that miptree |
| 285 | * will be inverted (including scanline order) when copying. This is common |
| 286 | * in GL when copying between window system and user-created |
| 287 | * renderbuffers/textures. |
| 288 | */ |
| 289 | bool |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 290 | intel_miptree_blit(struct brw_context *brw, |
Eric Anholt | 6a7c277 | 2013-02-04 14:24:09 -0800 | [diff] [blame] | 291 | struct intel_mipmap_tree *src_mt, |
| 292 | int src_level, int src_slice, |
| 293 | uint32_t src_x, uint32_t src_y, bool src_flip, |
| 294 | struct intel_mipmap_tree *dst_mt, |
| 295 | int dst_level, int dst_slice, |
| 296 | uint32_t dst_x, uint32_t dst_y, bool dst_flip, |
| 297 | uint32_t width, uint32_t height, |
| 298 | GLenum logicop) |
| 299 | { |
Kenneth Graunke | 73c78c5 | 2014-02-21 19:15:51 -0800 | [diff] [blame] | 300 | /* The blitter doesn't understand multisampling at all. */ |
Topi Pohjolainen | a92e6ff | 2017-06-22 14:03:31 +0300 | [diff] [blame] | 301 | if (src_mt->surf.samples > 1 || dst_mt->surf.samples > 1) |
Kenneth Graunke | 73c78c5 | 2014-02-21 19:15:51 -0800 | [diff] [blame] | 302 | return false; |
| 303 | |
Eric Anholt | 815dce9 | 2013-06-03 22:55:39 -0700 | [diff] [blame] | 304 | /* No sRGB decode or encode is done by the hardware blitter, which is |
Kenneth Graunke | b158652 | 2016-08-02 20:58:30 -0700 | [diff] [blame] | 305 | * consistent with what we want in many callers (glCopyTexSubImage(), |
| 306 | * texture validation, etc.). |
Eric Anholt | 6a7c277 | 2013-02-04 14:24:09 -0800 | [diff] [blame] | 307 | */ |
Mark Mueller | 71fe943 | 2014-01-04 14:11:43 -0800 | [diff] [blame] | 308 | mesa_format src_format = _mesa_get_srgb_format_linear(src_mt->format); |
| 309 | mesa_format dst_format = _mesa_get_srgb_format_linear(dst_mt->format); |
Eric Anholt | 815dce9 | 2013-06-03 22:55:39 -0700 | [diff] [blame] | 310 | |
| 311 | /* The blitter doesn't support doing any format conversions. We do also |
| 312 | * support blitting ARGB8888 to XRGB8888 (trivial, the values dropped into |
| 313 | * the X channel don't matter), and XRGB8888 to ARGB8888 by setting the A |
| 314 | * channel to 1.0 at the end. |
| 315 | */ |
Chris Wilson | 922c0c9 | 2015-06-05 14:45:18 +0100 | [diff] [blame] | 316 | if (!intel_miptree_blit_compatible_formats(src_format, dst_format)) { |
Eric Anholt | 815dce9 | 2013-06-03 22:55:39 -0700 | [diff] [blame] | 317 | perf_debug("%s: Can't use hardware blitter from %s to %s, " |
Marius Predut | 28d9e90 | 2015-04-07 22:05:28 +0300 | [diff] [blame] | 318 | "falling back.\n", __func__, |
Eric Anholt | 815dce9 | 2013-06-03 22:55:39 -0700 | [diff] [blame] | 319 | _mesa_get_format_name(src_format), |
| 320 | _mesa_get_format_name(dst_format)); |
| 321 | return false; |
| 322 | } |
Eric Anholt | 6a7c277 | 2013-02-04 14:24:09 -0800 | [diff] [blame] | 323 | |
Paul Berry | 67cd0f9 | 2013-05-07 14:55:42 -0700 | [diff] [blame] | 324 | /* The blitter has no idea about HiZ or fast color clears, so we need to |
| 325 | * resolve the miptrees before we do anything. |
Eric Anholt | 9720d43 | 2013-05-23 13:36:26 -0700 | [diff] [blame] | 326 | */ |
Jason Ekstrand | 421d713 | 2017-05-24 22:09:51 -0700 | [diff] [blame] | 327 | intel_miptree_access_raw(brw, src_mt, src_level, src_slice, false); |
| 328 | intel_miptree_access_raw(brw, dst_mt, dst_level, dst_slice, true); |
Eric Anholt | 9720d43 | 2013-05-23 13:36:26 -0700 | [diff] [blame] | 329 | |
Topi Pohjolainen | a844e6a | 2017-06-22 21:04:29 +0300 | [diff] [blame] | 330 | if (src_flip) { |
Topi Pohjolainen | bf24c35 | 2017-06-20 21:20:15 +0300 | [diff] [blame] | 331 | const unsigned h0 = src_mt->surf.phys_level0_sa.height; |
Topi Pohjolainen | a844e6a | 2017-06-22 21:04:29 +0300 | [diff] [blame] | 332 | src_y = minify(h0, src_level - src_mt->first_level) - src_y - height; |
| 333 | } |
| 334 | |
| 335 | if (dst_flip) { |
Topi Pohjolainen | bf24c35 | 2017-06-20 21:20:15 +0300 | [diff] [blame] | 336 | const unsigned h0 = dst_mt->surf.phys_level0_sa.height; |
Topi Pohjolainen | a844e6a | 2017-06-22 21:04:29 +0300 | [diff] [blame] | 337 | dst_y = minify(h0, dst_level - dst_mt->first_level) - dst_y - height; |
| 338 | } |
Eric Anholt | 6a7c277 | 2013-02-04 14:24:09 -0800 | [diff] [blame] | 339 | |
Ben Widawsky | efde74c | 2014-12-23 12:28:29 -0800 | [diff] [blame] | 340 | uint32_t src_image_x, src_image_y, dst_image_x, dst_image_y; |
Eric Anholt | 6a7c277 | 2013-02-04 14:24:09 -0800 | [diff] [blame] | 341 | intel_miptree_get_image_offset(src_mt, src_level, src_slice, |
| 342 | &src_image_x, &src_image_y); |
Eric Anholt | 6a7c277 | 2013-02-04 14:24:09 -0800 | [diff] [blame] | 343 | intel_miptree_get_image_offset(dst_mt, dst_level, dst_slice, |
| 344 | &dst_image_x, &dst_image_y); |
Ben Widawsky | efde74c | 2014-12-23 12:28:29 -0800 | [diff] [blame] | 345 | src_x += src_image_x; |
| 346 | src_y += src_image_y; |
Eric Anholt | 6a7c277 | 2013-02-04 14:24:09 -0800 | [diff] [blame] | 347 | dst_x += dst_image_x; |
| 348 | dst_y += dst_image_y; |
| 349 | |
Jason Ekstrand | 6c74e7f | 2016-11-30 18:14:27 -0800 | [diff] [blame] | 350 | if (!emit_miptree_blit(brw, src_mt, src_x, src_y, |
| 351 | dst_mt, dst_x, dst_y, width, height, |
| 352 | src_flip != dst_flip, logicop)) { |
| 353 | return false; |
Eric Anholt | 815dce9 | 2013-06-03 22:55:39 -0700 | [diff] [blame] | 354 | } |
| 355 | |
Chris Wilson | c2d0606 | 2015-06-05 14:33:36 +0100 | [diff] [blame] | 356 | /* XXX This could be done in a single pass using XY_FULL_MONO_PATTERN_BLT */ |
| 357 | if (_mesa_get_format_bits(src_format, GL_ALPHA_BITS) == 0 && |
| 358 | _mesa_get_format_bits(dst_format, GL_ALPHA_BITS) > 0) { |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 359 | intel_miptree_set_alpha_to_one(brw, dst_mt, |
Eric Anholt | 815dce9 | 2013-06-03 22:55:39 -0700 | [diff] [blame] | 360 | dst_x, dst_y, |
| 361 | width, height); |
| 362 | } |
| 363 | |
| 364 | return true; |
Eric Anholt | 6a7c277 | 2013-02-04 14:24:09 -0800 | [diff] [blame] | 365 | } |
| 366 | |
Jason Ekstrand | 06d8649 | 2016-11-30 19:08:51 -0800 | [diff] [blame] | 367 | bool |
| 368 | intel_miptree_copy(struct brw_context *brw, |
| 369 | struct intel_mipmap_tree *src_mt, |
| 370 | int src_level, int src_slice, |
| 371 | uint32_t src_x, uint32_t src_y, |
| 372 | struct intel_mipmap_tree *dst_mt, |
| 373 | int dst_level, int dst_slice, |
| 374 | uint32_t dst_x, uint32_t dst_y, |
| 375 | uint32_t src_width, uint32_t src_height) |
| 376 | { |
| 377 | /* The blitter doesn't understand multisampling at all. */ |
Topi Pohjolainen | a92e6ff | 2017-06-22 14:03:31 +0300 | [diff] [blame] | 378 | if (src_mt->surf.samples > 1 || dst_mt->surf.samples > 1) |
Jason Ekstrand | 06d8649 | 2016-11-30 19:08:51 -0800 | [diff] [blame] | 379 | return false; |
| 380 | |
| 381 | if (src_mt->format == MESA_FORMAT_S_UINT8) |
| 382 | return false; |
| 383 | |
| 384 | /* The blitter has no idea about HiZ or fast color clears, so we need to |
| 385 | * resolve the miptrees before we do anything. |
| 386 | */ |
Jason Ekstrand | 421d713 | 2017-05-24 22:09:51 -0700 | [diff] [blame] | 387 | intel_miptree_access_raw(brw, src_mt, src_level, src_slice, false); |
| 388 | intel_miptree_access_raw(brw, dst_mt, dst_level, dst_slice, true); |
Jason Ekstrand | 06d8649 | 2016-11-30 19:08:51 -0800 | [diff] [blame] | 389 | |
| 390 | uint32_t src_image_x, src_image_y; |
| 391 | intel_miptree_get_image_offset(src_mt, src_level, src_slice, |
| 392 | &src_image_x, &src_image_y); |
| 393 | |
| 394 | if (_mesa_is_format_compressed(src_mt->format)) { |
| 395 | GLuint bw, bh; |
| 396 | _mesa_get_format_block_size(src_mt->format, &bw, &bh); |
| 397 | |
Jason Ekstrand | 157971e | 2016-12-06 12:03:11 -0800 | [diff] [blame] | 398 | /* Compressed textures need not have dimensions that are a multiple of |
| 399 | * the block size. Rectangles in compressed textures do need to be a |
| 400 | * multiple of the block size. The one exception is that the right and |
| 401 | * bottom edges may be at the right or bottom edge of the miplevel even |
| 402 | * if it's not aligned. |
| 403 | */ |
Jason Ekstrand | 06d8649 | 2016-11-30 19:08:51 -0800 | [diff] [blame] | 404 | assert(src_x % bw == 0); |
| 405 | assert(src_y % bh == 0); |
Topi Pohjolainen | 07caa59 | 2017-06-22 21:12:40 +0300 | [diff] [blame] | 406 | |
Topi Pohjolainen | bf24c35 | 2017-06-20 21:20:15 +0300 | [diff] [blame] | 407 | assert(src_width % bw == 0 || |
| 408 | src_x + src_width == |
| 409 | minify(src_mt->surf.logical_level0_px.width, src_level)); |
| 410 | assert(src_height % bh == 0 || |
| 411 | src_y + src_height == |
| 412 | minify(src_mt->surf.logical_level0_px.height, src_level)); |
Jason Ekstrand | 06d8649 | 2016-11-30 19:08:51 -0800 | [diff] [blame] | 413 | |
| 414 | src_x /= (int)bw; |
| 415 | src_y /= (int)bh; |
Jason Ekstrand | 0901d0b | 2017-05-13 11:02:22 -0700 | [diff] [blame] | 416 | src_width = DIV_ROUND_UP(src_width, (int)bw); |
| 417 | src_height = DIV_ROUND_UP(src_height, (int)bh); |
Jason Ekstrand | 06d8649 | 2016-11-30 19:08:51 -0800 | [diff] [blame] | 418 | } |
| 419 | src_x += src_image_x; |
| 420 | src_y += src_image_y; |
| 421 | |
| 422 | uint32_t dst_image_x, dst_image_y; |
| 423 | intel_miptree_get_image_offset(dst_mt, dst_level, dst_slice, |
| 424 | &dst_image_x, &dst_image_y); |
| 425 | |
| 426 | if (_mesa_is_format_compressed(dst_mt->format)) { |
| 427 | GLuint bw, bh; |
| 428 | _mesa_get_format_block_size(dst_mt->format, &bw, &bh); |
| 429 | |
| 430 | assert(dst_x % bw == 0); |
| 431 | assert(dst_y % bh == 0); |
| 432 | |
| 433 | dst_x /= (int)bw; |
| 434 | dst_y /= (int)bh; |
| 435 | } |
| 436 | dst_x += dst_image_x; |
| 437 | dst_y += dst_image_y; |
| 438 | |
| 439 | return emit_miptree_blit(brw, src_mt, src_x, src_y, |
| 440 | dst_mt, dst_x, dst_y, |
| 441 | src_width, src_height, false, GL_COPY); |
| 442 | } |
| 443 | |
Kenneth Graunke | 5957da1 | 2015-04-21 12:32:38 -0700 | [diff] [blame] | 444 | static bool |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 445 | alignment_valid(struct brw_context *brw, unsigned offset, |
| 446 | enum isl_tiling tiling) |
Kenneth Graunke | 5957da1 | 2015-04-21 12:32:38 -0700 | [diff] [blame] | 447 | { |
| 448 | /* Tiled buffers must be page-aligned (4K). */ |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 449 | if (tiling != ISL_TILING_LINEAR) |
Kenneth Graunke | 5957da1 | 2015-04-21 12:32:38 -0700 | [diff] [blame] | 450 | return (offset & 4095) == 0; |
| 451 | |
| 452 | /* On Gen8+, linear buffers must be cacheline-aligned. */ |
| 453 | if (brw->gen >= 8) |
| 454 | return (offset & 63) == 0; |
| 455 | |
| 456 | return true; |
| 457 | } |
| 458 | |
Anuj Phogat | 3df5aaa | 2015-05-27 19:28:34 -0700 | [diff] [blame] | 459 | static uint32_t |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 460 | xy_blit_cmd(enum isl_tiling src_tiling, enum isl_tiling dst_tiling, |
| 461 | uint32_t cpp) |
Anuj Phogat | 3df5aaa | 2015-05-27 19:28:34 -0700 | [diff] [blame] | 462 | { |
| 463 | uint32_t CMD = 0; |
| 464 | |
Anuj Phogat | bcee124 | 2017-03-16 10:35:49 -0700 | [diff] [blame] | 465 | assert(cpp <= 4); |
| 466 | switch (cpp) { |
| 467 | case 1: |
| 468 | case 2: |
| 469 | CMD = XY_SRC_COPY_BLT_CMD; |
| 470 | break; |
| 471 | case 4: |
| 472 | CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; |
| 473 | break; |
| 474 | default: |
| 475 | unreachable("not reached"); |
Anuj Phogat | 3df5aaa | 2015-05-27 19:28:34 -0700 | [diff] [blame] | 476 | } |
Anuj Phogat | bcee124 | 2017-03-16 10:35:49 -0700 | [diff] [blame] | 477 | |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 478 | if (dst_tiling != ISL_TILING_LINEAR) |
Anuj Phogat | bcee124 | 2017-03-16 10:35:49 -0700 | [diff] [blame] | 479 | CMD |= XY_DST_TILED; |
| 480 | |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 481 | if (src_tiling != ISL_TILING_LINEAR) |
Anuj Phogat | bcee124 | 2017-03-16 10:35:49 -0700 | [diff] [blame] | 482 | CMD |= XY_SRC_TILED; |
| 483 | |
Anuj Phogat | 3df5aaa | 2015-05-27 19:28:34 -0700 | [diff] [blame] | 484 | return CMD; |
| 485 | } |
| 486 | |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 487 | /* Copy BitBlt |
| 488 | */ |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 489 | bool |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 490 | intelEmitCopyBlit(struct brw_context *brw, |
Eric Anholt | c1d6b87 | 2007-12-17 13:19:33 -0800 | [diff] [blame] | 491 | GLuint cpp, |
Kenneth Graunke | f8f7ea5 | 2017-01-22 01:44:08 -0800 | [diff] [blame] | 492 | int32_t src_pitch, |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 493 | struct brw_bo *src_buffer, |
Eric Anholt | c1d6b87 | 2007-12-17 13:19:33 -0800 | [diff] [blame] | 494 | GLuint src_offset, |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 495 | enum isl_tiling src_tiling, |
Kenneth Graunke | f8f7ea5 | 2017-01-22 01:44:08 -0800 | [diff] [blame] | 496 | int32_t dst_pitch, |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 497 | struct brw_bo *dst_buffer, |
Eric Anholt | c1d6b87 | 2007-12-17 13:19:33 -0800 | [diff] [blame] | 498 | GLuint dst_offset, |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 499 | enum isl_tiling dst_tiling, |
Eric Anholt | c1d6b87 | 2007-12-17 13:19:33 -0800 | [diff] [blame] | 500 | GLshort src_x, GLshort src_y, |
| 501 | GLshort dst_x, GLshort dst_y, |
Keith Whitwell | f332da5 | 2006-11-21 14:43:30 +0000 | [diff] [blame] | 502 | GLshort w, GLshort h, |
| 503 | GLenum logic_op) |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 504 | { |
Kenneth Graunke | eb41aa8 | 2017-03-28 20:20:00 -0700 | [diff] [blame] | 505 | GLuint CMD, BR13; |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 506 | int dst_y2 = dst_y + h; |
| 507 | int dst_x2 = dst_x + w; |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 508 | bool dst_y_tiled = dst_tiling == ISL_TILING_Y0; |
| 509 | bool src_y_tiled = src_tiling == ISL_TILING_Y0; |
Anuj Phogat | 0fa39bf | 2015-08-11 16:31:39 -0700 | [diff] [blame] | 510 | uint32_t src_tile_w, src_tile_h; |
| 511 | uint32_t dst_tile_w, dst_tile_h; |
Kenneth Graunke | 5957da1 | 2015-04-21 12:32:38 -0700 | [diff] [blame] | 512 | |
Kenneth Graunke | 53631be | 2013-07-06 00:36:46 -0700 | [diff] [blame] | 513 | if ((dst_y_tiled || src_y_tiled) && brw->gen < 6) |
Eric Anholt | 78c2fc5 | 2013-06-03 16:49:40 -0700 | [diff] [blame] | 514 | return false; |
Eric Anholt | 8f81a64 | 2009-06-22 11:00:11 -0700 | [diff] [blame] | 515 | |
Kenneth Graunke | eb41aa8 | 2017-03-28 20:20:00 -0700 | [diff] [blame] | 516 | const unsigned bo_sizes = dst_buffer->size + src_buffer->size; |
| 517 | |
Eric Anholt | c8e6a0f | 2010-01-26 18:01:37 -0800 | [diff] [blame] | 518 | /* do space check before going any further */ |
Kenneth Graunke | eb41aa8 | 2017-03-28 20:20:00 -0700 | [diff] [blame] | 519 | if (!brw_batch_has_aperture_space(brw, bo_sizes)) |
| 520 | intel_batchbuffer_flush(brw); |
Dave Airlie | f75843a | 2008-08-24 17:59:10 +1000 | [diff] [blame] | 521 | |
Kenneth Graunke | eb41aa8 | 2017-03-28 20:20:00 -0700 | [diff] [blame] | 522 | if (!brw_batch_has_aperture_space(brw, bo_sizes)) |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 523 | return false; |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 524 | |
Ben Widawsky | 9cd4f90 | 2014-12-10 20:00:51 -0800 | [diff] [blame] | 525 | unsigned length = brw->gen >= 8 ? 10 : 8; |
| 526 | |
| 527 | intel_batchbuffer_require_space(brw, length * 4, BLT_RING); |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 528 | DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", |
Marius Predut | 28d9e90 | 2015-04-07 22:05:28 +0300 | [diff] [blame] | 529 | __func__, |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 530 | src_buffer, src_pitch, src_offset, src_x, src_y, |
| 531 | dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h); |
| 532 | |
Anuj Phogat | bcee124 | 2017-03-16 10:35:49 -0700 | [diff] [blame] | 533 | intel_get_tile_dims(src_tiling, cpp, &src_tile_w, &src_tile_h); |
| 534 | intel_get_tile_dims(dst_tiling, cpp, &dst_tile_w, &dst_tile_h); |
Anuj Phogat | 0fa39bf | 2015-08-11 16:31:39 -0700 | [diff] [blame] | 535 | |
Anuj Phogat | 0bfd914 | 2015-08-11 16:36:44 -0700 | [diff] [blame] | 536 | /* For Tiled surfaces, the pitch has to be a multiple of the Tile width |
| 537 | * (X direction width of the Tile). This is ensured while allocating the |
| 538 | * buffer object. |
| 539 | */ |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 540 | assert(src_tiling == ISL_TILING_LINEAR || (src_pitch % src_tile_w) == 0); |
| 541 | assert(dst_tiling == ISL_TILING_LINEAR || (dst_pitch % dst_tile_w) == 0); |
Anuj Phogat | 0bfd914 | 2015-08-11 16:36:44 -0700 | [diff] [blame] | 542 | |
Anuj Phogat | bcee124 | 2017-03-16 10:35:49 -0700 | [diff] [blame] | 543 | /* For big formats (such as floating point), do the copy using 16 or |
| 544 | * 32bpp and multiply the coordinates. |
| 545 | */ |
| 546 | if (cpp > 4) { |
| 547 | if (cpp % 4 == 2) { |
| 548 | dst_x *= cpp / 2; |
| 549 | dst_x2 *= cpp / 2; |
| 550 | src_x *= cpp / 2; |
| 551 | cpp = 2; |
| 552 | } else { |
| 553 | assert(cpp % 4 == 0); |
| 554 | dst_x *= cpp / 4; |
| 555 | dst_x2 *= cpp / 4; |
| 556 | src_x *= cpp / 4; |
| 557 | cpp = 4; |
| 558 | } |
| 559 | } |
| 560 | |
| 561 | if (!alignment_valid(brw, dst_offset, dst_tiling)) |
| 562 | return false; |
| 563 | if (!alignment_valid(brw, src_offset, src_tiling)) |
Anuj Phogat | 0bf037c | 2015-11-10 15:33:53 -0800 | [diff] [blame] | 564 | return false; |
Eric Anholt | a1488ee | 2011-10-31 16:59:05 -0700 | [diff] [blame] | 565 | |
Anuj Phogat | bcee124 | 2017-03-16 10:35:49 -0700 | [diff] [blame] | 566 | /* Blit pitch must be dword-aligned. Otherwise, the hardware appears to drop |
| 567 | * the low bits. Offsets must be naturally aligned. |
| 568 | */ |
| 569 | if (src_pitch % 4 != 0 || src_offset % cpp != 0 || |
| 570 | dst_pitch % 4 != 0 || dst_offset % cpp != 0) |
| 571 | return false; |
Anuj Phogat | 0c02d70 | 2016-05-25 11:33:51 -0700 | [diff] [blame] | 572 | |
Anuj Phogat | bcee124 | 2017-03-16 10:35:49 -0700 | [diff] [blame] | 573 | assert(cpp <= 4); |
| 574 | BR13 = br13_for_cpp(cpp) | translate_raster_op(logic_op) << 16; |
Anuj Phogat | 412c8c8 | 2015-04-14 22:06:49 -0700 | [diff] [blame] | 575 | |
Anuj Phogat | bcee124 | 2017-03-16 10:35:49 -0700 | [diff] [blame] | 576 | CMD = xy_blit_cmd(src_tiling, dst_tiling, cpp); |
Eric Anholt | f00a649 | 2007-11-16 16:43:45 -0800 | [diff] [blame] | 577 | |
Anuj Phogat | e83b07a | 2015-08-11 16:30:34 -0700 | [diff] [blame] | 578 | /* For tiled source and destination, pitch value should be specified |
| 579 | * as a number of Dwords. |
| 580 | */ |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 581 | if (dst_tiling != ISL_TILING_LINEAR) |
Anuj Phogat | e83b07a | 2015-08-11 16:30:34 -0700 | [diff] [blame] | 582 | dst_pitch /= 4; |
| 583 | |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 584 | if (src_tiling != ISL_TILING_LINEAR) |
Anuj Phogat | e83b07a | 2015-08-11 16:30:34 -0700 | [diff] [blame] | 585 | src_pitch /= 4; |
| 586 | |
| 587 | if (dst_y2 <= dst_y || dst_x2 <= dst_x) |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 588 | return true; |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 589 | |
Eric Anholt | 3e0164a | 2008-11-21 17:09:47 +0800 | [diff] [blame] | 590 | assert(dst_x < dst_x2); |
| 591 | assert(dst_y < dst_y2); |
Michel Dänzer | 63e6bfe | 2007-11-09 18:46:55 +0100 | [diff] [blame] | 592 | |
Kenneth Graunke | 94c0a11 | 2013-01-12 16:12:38 -0800 | [diff] [blame] | 593 | BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, src_y_tiled); |
| 594 | OUT_BATCH(CMD | (length - 2)); |
Eric Anholt | 3e0164a | 2008-11-21 17:09:47 +0800 | [diff] [blame] | 595 | OUT_BATCH(BR13 | (uint16_t)dst_pitch); |
Eric Anholt | 66524da | 2013-12-23 01:48:09 -0800 | [diff] [blame] | 596 | OUT_BATCH(SET_FIELD(dst_y, BLT_Y) | SET_FIELD(dst_x, BLT_X)); |
| 597 | OUT_BATCH(SET_FIELD(dst_y2, BLT_Y) | SET_FIELD(dst_x2, BLT_X)); |
Kenneth Graunke | 94c0a11 | 2013-01-12 16:12:38 -0800 | [diff] [blame] | 598 | if (brw->gen >= 8) { |
| 599 | OUT_RELOC64(dst_buffer, |
| 600 | I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, |
| 601 | dst_offset); |
| 602 | } else { |
| 603 | OUT_RELOC(dst_buffer, |
| 604 | I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, |
| 605 | dst_offset); |
| 606 | } |
Eric Anholt | 66524da | 2013-12-23 01:48:09 -0800 | [diff] [blame] | 607 | OUT_BATCH(SET_FIELD(src_y, BLT_Y) | SET_FIELD(src_x, BLT_X)); |
Eric Anholt | 3e0164a | 2008-11-21 17:09:47 +0800 | [diff] [blame] | 608 | OUT_BATCH((uint16_t)src_pitch); |
Kenneth Graunke | 94c0a11 | 2013-01-12 16:12:38 -0800 | [diff] [blame] | 609 | if (brw->gen >= 8) { |
| 610 | OUT_RELOC64(src_buffer, |
| 611 | I915_GEM_DOMAIN_RENDER, 0, |
| 612 | src_offset); |
| 613 | } else { |
| 614 | OUT_RELOC(src_buffer, |
| 615 | I915_GEM_DOMAIN_RENDER, 0, |
| 616 | src_offset); |
| 617 | } |
Eric Anholt | d641a01 | 2013-05-06 14:12:56 -0700 | [diff] [blame] | 618 | |
Eric Anholt | 78c2fc5 | 2013-06-03 16:49:40 -0700 | [diff] [blame] | 619 | ADVANCE_BATCH_TILED(dst_y_tiled, src_y_tiled); |
Michel Dänzer | 63e6bfe | 2007-11-09 18:46:55 +0100 | [diff] [blame] | 620 | |
Chris Wilson | 4b35ab9 | 2015-04-30 17:04:51 +0100 | [diff] [blame] | 621 | brw_emit_mi_flush(brw); |
Eric Anholt | 8f81a64 | 2009-06-22 11:00:11 -0700 | [diff] [blame] | 622 | |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 623 | return true; |
Keith Whitwell | 6b9e31f | 2006-11-01 12:03:11 +0000 | [diff] [blame] | 624 | } |
| 625 | |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 626 | bool |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 627 | intelEmitImmediateColorExpandBlit(struct brw_context *brw, |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 628 | GLuint cpp, |
| 629 | GLubyte *src_bits, GLuint src_size, |
| 630 | GLuint fg_color, |
| 631 | GLshort dst_pitch, |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 632 | struct brw_bo *dst_buffer, |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 633 | GLuint dst_offset, |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 634 | enum isl_tiling dst_tiling, |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 635 | GLshort x, GLshort y, |
| 636 | GLshort w, GLshort h, |
| 637 | GLenum logic_op) |
| 638 | { |
| 639 | int dwords = ALIGN(src_size, 8) / 4; |
| 640 | uint32_t opcode, br13, blit_cmd; |
| 641 | |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 642 | if (dst_tiling != ISL_TILING_LINEAR) { |
Eric Anholt | 1593a1b | 2009-06-22 15:23:38 -0700 | [diff] [blame] | 643 | if (dst_offset & 4095) |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 644 | return false; |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 645 | if (dst_tiling == ISL_TILING_Y0) |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 646 | return false; |
Eric Anholt | 1593a1b | 2009-06-22 15:23:38 -0700 | [diff] [blame] | 647 | } |
Eric Anholt | 8f81a64 | 2009-06-22 11:00:11 -0700 | [diff] [blame] | 648 | |
Vinson Lee | 68f1b27 | 2013-11-03 14:43:53 -0800 | [diff] [blame] | 649 | assert((logic_op >= GL_CLEAR) && (logic_op <= (GL_CLEAR + 0x0f))); |
Eric Anholt | b82abaa | 2009-08-07 17:06:41 -0700 | [diff] [blame] | 650 | assert(dst_pitch > 0); |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 651 | |
| 652 | if (w < 0 || h < 0) |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 653 | return true; |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 654 | |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 655 | DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n", |
Marius Predut | 28d9e90 | 2015-04-07 22:05:28 +0300 | [diff] [blame] | 656 | __func__, |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 657 | dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords); |
| 658 | |
Ben Widawsky | 9cd4f90 | 2014-12-10 20:00:51 -0800 | [diff] [blame] | 659 | unsigned xy_setup_blt_length = brw->gen >= 8 ? 10 : 8; |
| 660 | intel_batchbuffer_require_space(brw, (xy_setup_blt_length * 4) + |
| 661 | (3 * 4) + dwords * 4, BLT_RING); |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 662 | |
| 663 | opcode = XY_SETUP_BLT_CMD; |
| 664 | if (cpp == 4) |
| 665 | opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 666 | if (dst_tiling != ISL_TILING_LINEAR) { |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 667 | opcode |= XY_DST_TILED; |
Eric Anholt | eda68cc | 2008-06-24 09:37:07 -0700 | [diff] [blame] | 668 | dst_pitch /= 4; |
| 669 | } |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 670 | |
| 671 | br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29); |
Eric Anholt | 6383428 | 2010-05-25 11:45:05 -0700 | [diff] [blame] | 672 | br13 |= br13_for_cpp(cpp); |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 673 | |
| 674 | blit_cmd = XY_TEXT_IMMEDIATE_BLIT_CMD | XY_TEXT_BYTE_PACKED; /* packing? */ |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 675 | if (dst_tiling != ISL_TILING_LINEAR) |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 676 | blit_cmd |= XY_DST_TILED; |
| 677 | |
Kenneth Graunke | 94c0a11 | 2013-01-12 16:12:38 -0800 | [diff] [blame] | 678 | BEGIN_BATCH_BLT(xy_setup_blt_length + 3); |
| 679 | OUT_BATCH(opcode | (xy_setup_blt_length - 2)); |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 680 | OUT_BATCH(br13); |
| 681 | OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */ |
| 682 | OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */ |
Kenneth Graunke | 94c0a11 | 2013-01-12 16:12:38 -0800 | [diff] [blame] | 683 | if (brw->gen >= 8) { |
| 684 | OUT_RELOC64(dst_buffer, |
| 685 | I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, |
| 686 | dst_offset); |
| 687 | } else { |
| 688 | OUT_RELOC(dst_buffer, |
| 689 | I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, |
| 690 | dst_offset); |
| 691 | } |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 692 | OUT_BATCH(0); /* bg */ |
| 693 | OUT_BATCH(fg_color); /* fg */ |
| 694 | OUT_BATCH(0); /* pattern base addr */ |
Kenneth Graunke | 94c0a11 | 2013-01-12 16:12:38 -0800 | [diff] [blame] | 695 | if (brw->gen >= 8) |
| 696 | OUT_BATCH(0); |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 697 | |
| 698 | OUT_BATCH(blit_cmd | ((3 - 2) + dwords)); |
Eric Anholt | 66524da | 2013-12-23 01:48:09 -0800 | [diff] [blame] | 699 | OUT_BATCH(SET_FIELD(y, BLT_Y) | SET_FIELD(x, BLT_X)); |
| 700 | OUT_BATCH(SET_FIELD(y + h, BLT_Y) | SET_FIELD(x + w, BLT_X)); |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 701 | ADVANCE_BATCH(); |
| 702 | |
Kenneth Graunke | 6bc40f9 | 2013-10-28 16:06:10 -0700 | [diff] [blame] | 703 | intel_batchbuffer_data(brw, src_bits, dwords * 4, BLT_RING); |
Dave Airlie | f75843a | 2008-08-24 17:59:10 +1000 | [diff] [blame] | 704 | |
Chris Wilson | 4b35ab9 | 2015-04-30 17:04:51 +0100 | [diff] [blame] | 705 | brw_emit_mi_flush(brw); |
Eric Anholt | 8f81a64 | 2009-06-22 11:00:11 -0700 | [diff] [blame] | 706 | |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 707 | return true; |
Eric Anholt | bea6b5f | 2007-12-20 11:29:39 -0800 | [diff] [blame] | 708 | } |
Eric Anholt | 2d5c74f | 2009-08-26 18:08:52 -0700 | [diff] [blame] | 709 | |
| 710 | /* We don't have a memmove-type blit like some other hardware, so we'll do a |
| 711 | * rectangular blit covering a large space, then emit 1-scanline blit at the |
| 712 | * end to cover the last if we need. |
| 713 | */ |
| 714 | void |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 715 | intel_emit_linear_blit(struct brw_context *brw, |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 716 | struct brw_bo *dst_bo, |
Eric Anholt | 2d5c74f | 2009-08-26 18:08:52 -0700 | [diff] [blame] | 717 | unsigned int dst_offset, |
Kenneth Graunke | d30a927 | 2017-04-03 20:13:08 -0700 | [diff] [blame] | 718 | struct brw_bo *src_bo, |
Eric Anholt | 2d5c74f | 2009-08-26 18:08:52 -0700 | [diff] [blame] | 719 | unsigned int src_offset, |
| 720 | unsigned int size) |
| 721 | { |
Kenneth Graunke | 8c9a54e | 2013-07-06 00:46:38 -0700 | [diff] [blame] | 722 | struct gl_context *ctx = &brw->ctx; |
Eric Anholt | 2d5c74f | 2009-08-26 18:08:52 -0700 | [diff] [blame] | 723 | GLuint pitch, height; |
Kenneth Graunke | 8c17d53 | 2015-04-15 03:04:33 -0700 | [diff] [blame] | 724 | int16_t src_x, dst_x; |
Kenneth Graunke | 2e5a1a2 | 2011-10-07 12:26:50 -0700 | [diff] [blame] | 725 | bool ok; |
Eric Anholt | 2d5c74f | 2009-08-26 18:08:52 -0700 | [diff] [blame] | 726 | |
Chris Wilson | d38a560 | 2015-06-06 09:33:33 +0100 | [diff] [blame] | 727 | do { |
| 728 | /* The pitch given to the GPU must be DWORD aligned, and |
| 729 | * we want width to match pitch. Max width is (1 << 15 - 1), |
| 730 | * rounding that down to the nearest DWORD is 1 << 15 - 4 |
| 731 | */ |
| 732 | pitch = ROUND_DOWN_TO(MIN2(size, (1 << 15) - 64), 4); |
| 733 | height = (size < pitch || pitch == 0) ? 1 : size / pitch; |
Eric Anholt | 2d5c74f | 2009-08-26 18:08:52 -0700 | [diff] [blame] | 734 | |
Chris Wilson | d38a560 | 2015-06-06 09:33:33 +0100 | [diff] [blame] | 735 | src_x = src_offset % 64; |
| 736 | dst_x = dst_offset % 64; |
| 737 | pitch = ALIGN(MIN2(size, (1 << 15) - 64), 4); |
| 738 | assert(src_x + pitch < 1 << 15); |
| 739 | assert(dst_x + pitch < 1 << 15); |
Kenneth Graunke | 8c17d53 | 2015-04-15 03:04:33 -0700 | [diff] [blame] | 740 | |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 741 | ok = intelEmitCopyBlit(brw, 1, |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 742 | pitch, src_bo, src_offset - src_x, |
| 743 | ISL_TILING_LINEAR, |
| 744 | pitch, dst_bo, dst_offset - dst_x, |
| 745 | ISL_TILING_LINEAR, |
Chris Wilson | d38a560 | 2015-06-06 09:33:33 +0100 | [diff] [blame] | 746 | src_x, 0, /* src x/y */ |
| 747 | dst_x, 0, /* dst x/y */ |
| 748 | MIN2(size, pitch), height, /* w, h */ |
| 749 | GL_COPY); |
| 750 | if (!ok) { |
| 751 | _mesa_problem(ctx, "Failed to linear blit %dx%d\n", |
| 752 | MIN2(size, pitch), height); |
| 753 | return; |
| 754 | } |
| 755 | |
| 756 | pitch *= height; |
| 757 | if (size <= pitch) |
| 758 | return; |
| 759 | |
| 760 | src_offset += pitch; |
| 761 | dst_offset += pitch; |
| 762 | size -= pitch; |
| 763 | } while (1); |
Eric Anholt | 2d5c74f | 2009-08-26 18:08:52 -0700 | [diff] [blame] | 764 | } |
Eric Anholt | 290a114 | 2010-12-15 12:10:03 -0800 | [diff] [blame] | 765 | |
| 766 | /** |
Eric Anholt | 815dce9 | 2013-06-03 22:55:39 -0700 | [diff] [blame] | 767 | * Used to initialize the alpha value of an ARGB8888 miptree after copying |
| 768 | * into it from an XRGB8888 source. |
Eric Anholt | 290a114 | 2010-12-15 12:10:03 -0800 | [diff] [blame] | 769 | * |
Eric Anholt | 815dce9 | 2013-06-03 22:55:39 -0700 | [diff] [blame] | 770 | * This is very common with glCopyTexImage2D(). Note that the coordinates are |
| 771 | * relative to the start of the miptree, not relative to a slice within the |
| 772 | * miptree. |
Eric Anholt | 290a114 | 2010-12-15 12:10:03 -0800 | [diff] [blame] | 773 | */ |
Eric Anholt | 815dce9 | 2013-06-03 22:55:39 -0700 | [diff] [blame] | 774 | static void |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 775 | intel_miptree_set_alpha_to_one(struct brw_context *brw, |
Eric Anholt | 815dce9 | 2013-06-03 22:55:39 -0700 | [diff] [blame] | 776 | struct intel_mipmap_tree *mt, |
| 777 | int x, int y, int width, int height) |
Eric Anholt | 290a114 | 2010-12-15 12:10:03 -0800 | [diff] [blame] | 778 | { |
Eric Anholt | 290a114 | 2010-12-15 12:10:03 -0800 | [diff] [blame] | 779 | uint32_t BR13, CMD; |
| 780 | int pitch, cpp; |
Eric Anholt | 290a114 | 2010-12-15 12:10:03 -0800 | [diff] [blame] | 781 | |
Topi Pohjolainen | b95caac | 2017-06-22 15:54:04 +0300 | [diff] [blame] | 782 | pitch = mt->surf.row_pitch; |
Eric Anholt | e16c5c9 | 2014-04-25 13:29:41 -0700 | [diff] [blame] | 783 | cpp = mt->cpp; |
Eric Anholt | 290a114 | 2010-12-15 12:10:03 -0800 | [diff] [blame] | 784 | |
| 785 | DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n", |
Marius Predut | 28d9e90 | 2015-04-07 22:05:28 +0300 | [diff] [blame] | 786 | __func__, mt->bo, pitch, x, y, width, height); |
Eric Anholt | 290a114 | 2010-12-15 12:10:03 -0800 | [diff] [blame] | 787 | |
Chris Wilson | 8d68a90 | 2011-02-10 20:25:51 +0000 | [diff] [blame] | 788 | BR13 = br13_for_cpp(cpp) | 0xf0 << 16; |
Eric Anholt | 290a114 | 2010-12-15 12:10:03 -0800 | [diff] [blame] | 789 | CMD = XY_COLOR_BLT_CMD; |
| 790 | CMD |= XY_BLT_WRITE_ALPHA; |
| 791 | |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 792 | if (mt->surf.tiling != ISL_TILING_LINEAR) { |
Eric Anholt | 290a114 | 2010-12-15 12:10:03 -0800 | [diff] [blame] | 793 | CMD |= XY_DST_TILED; |
| 794 | pitch /= 4; |
| 795 | } |
Eric Anholt | 60894ed | 2013-01-10 15:11:28 -0800 | [diff] [blame] | 796 | BR13 |= pitch; |
Eric Anholt | 290a114 | 2010-12-15 12:10:03 -0800 | [diff] [blame] | 797 | |
| 798 | /* do space check before going any further */ |
Kenneth Graunke | eb41aa8 | 2017-03-28 20:20:00 -0700 | [diff] [blame] | 799 | if (!brw_batch_has_aperture_space(brw, mt->bo->size)) |
Kenneth Graunke | ca43757 | 2013-07-02 23:17:14 -0700 | [diff] [blame] | 800 | intel_batchbuffer_flush(brw); |
Eric Anholt | 290a114 | 2010-12-15 12:10:03 -0800 | [diff] [blame] | 801 | |
Kenneth Graunke | 94c0a11 | 2013-01-12 16:12:38 -0800 | [diff] [blame] | 802 | unsigned length = brw->gen >= 8 ? 7 : 6; |
Topi Pohjolainen | 43c3b5b | 2017-06-22 15:17:41 +0300 | [diff] [blame] | 803 | const bool dst_y_tiled = mt->surf.tiling == ISL_TILING_Y0; |
Eric Anholt | 04a5e94 | 2013-06-03 22:40:26 -0700 | [diff] [blame] | 804 | |
Jason Ekstrand | b7979a8 | 2016-10-24 14:57:21 -0700 | [diff] [blame] | 805 | /* We need to split the blit into chunks that each fit within the blitter's |
| 806 | * restrictions. We can't use a chunk size of 32768 because we need to |
| 807 | * ensure that src_tile_x + chunk_size fits. We choose 16384 because it's |
| 808 | * a nice round power of two, big enough that performance won't suffer, and |
| 809 | * small enough to guarantee everything fits. |
| 810 | */ |
| 811 | const uint32_t max_chunk_size = 16384; |
| 812 | |
| 813 | for (uint32_t chunk_x = 0; chunk_x < width; chunk_x += max_chunk_size) { |
| 814 | for (uint32_t chunk_y = 0; chunk_y < height; chunk_y += max_chunk_size) { |
| 815 | const uint32_t chunk_w = MIN2(max_chunk_size, width - chunk_x); |
| 816 | const uint32_t chunk_h = MIN2(max_chunk_size, height - chunk_y); |
| 817 | |
| 818 | uint32_t offset, tile_x, tile_y; |
| 819 | get_blit_intratile_offset_el(brw, mt, |
| 820 | x + chunk_x, y + chunk_y, |
| 821 | &offset, &tile_x, &tile_y); |
| 822 | |
| 823 | BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, false); |
| 824 | OUT_BATCH(CMD | (length - 2)); |
| 825 | OUT_BATCH(BR13); |
| 826 | OUT_BATCH(SET_FIELD(y + chunk_y, BLT_Y) | |
| 827 | SET_FIELD(x + chunk_x, BLT_X)); |
| 828 | OUT_BATCH(SET_FIELD(y + chunk_y + chunk_h, BLT_Y) | |
| 829 | SET_FIELD(x + chunk_x + chunk_w, BLT_X)); |
| 830 | if (brw->gen >= 8) { |
| 831 | OUT_RELOC64(mt->bo, |
| 832 | I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, |
Chris Wilson | fb63c43 | 2017-07-31 10:56:15 +0100 | [diff] [blame^] | 833 | mt->offset + offset); |
Jason Ekstrand | b7979a8 | 2016-10-24 14:57:21 -0700 | [diff] [blame] | 834 | } else { |
| 835 | OUT_RELOC(mt->bo, |
| 836 | I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, |
Chris Wilson | fb63c43 | 2017-07-31 10:56:15 +0100 | [diff] [blame^] | 837 | mt->offset + offset); |
Jason Ekstrand | b7979a8 | 2016-10-24 14:57:21 -0700 | [diff] [blame] | 838 | } |
| 839 | OUT_BATCH(0xffffffff); /* white, but only alpha gets written */ |
| 840 | ADVANCE_BATCH_TILED(dst_y_tiled, false); |
| 841 | } |
Kenneth Graunke | 94c0a11 | 2013-01-12 16:12:38 -0800 | [diff] [blame] | 842 | } |
Eric Anholt | 290a114 | 2010-12-15 12:10:03 -0800 | [diff] [blame] | 843 | |
Chris Wilson | 4b35ab9 | 2015-04-30 17:04:51 +0100 | [diff] [blame] | 844 | brw_emit_mi_flush(brw); |
Eric Anholt | 290a114 | 2010-12-15 12:10:03 -0800 | [diff] [blame] | 845 | } |