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37f926206402e227391179cc1a3fa78b1c2673f7
37f9262
docs: add news item and link release notes for 13.0.3
by Emil Velikov
· 8 years ago
934792b
docs: add sha256 checksums for 13.0.3
by Emil Velikov
· 8 years ago
5cd9660
docs: add release notes for 13.0.3
by Emil Velikov
· 8 years ago
ee4b479
st/va: fix incorrect argument in vl_compositor_cleanup
by Nayan Deshmukh
· 8 years ago
68ddcc6
swr: remove unneeded llvm version check
by Tim Rowley
· 8 years ago
36ad826
swr: fix windows build break
by George Kyriazis
· 8 years ago
3753dc8
radeonsi: update clip_regs if clip_disable changes to fix a hang
by Marek Olšák
· 8 years ago
c7affbf
st/mesa: enable GLSLOptimizeConservatively for drivers that want it
by Marek Olšák
· 8 years ago
96fe883
glsl_to_tgsi: do fewer optimizations with GLSLOptimizeConservatively
by Marek Olšák
· 8 years ago
0a5018c
mesa: add gl_constants::GLSLOptimizeConservatively
by Marek Olšák
· 8 years ago
e51baeb
gallium: add PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY
by Marek Olšák
· 8 years ago
d3cb79e
glsl: run do_lower_jumps properly in do_common_optimizations
by Marek Olšák
· 8 years ago
7c6b714
i965: Print VS output VUE map in Vulkan too.
by Kenneth Graunke
· 8 years ago
480d6c1
i965: Fix last slot calculations
by Kenneth Graunke
· 8 years ago
8dc92a5
docs: Mark GL_ARB_gpu_shader_fp64 and OpenGL 4.0 as done for i965/hsw+
by Iago Toral Quiroga
· 8 years ago
580c503
docs: add GL_ARB_gpu_shader_fp64 and OpenGL 4.0 support for Intel Haswell.
by Iago Toral Quiroga
· 8 years ago
a98f2e5
i965: add a kernel_features bitfield to intel screen
by Iago Toral Quiroga
· 8 years ago
e3123c8
i965/gen7: Enable OpenGL 4.0 in Haswell when supported
by Iago Toral Quiroga
· 8 years ago
1f1b8de
i965: get rid of brw->can_do_pipelined_register_writes
by Iago Toral Quiroga
· 8 years ago
02a4448
i965: Move the pipelined test for SO register access to the screen
by Chris Wilson
· 8 years ago
ab1ec7d
i965/disasm: remove printing hstride and width in align16 DF source regions
by Samuel Iglesias Gonsálvez
· 8 years ago
301fdfd
vec4: use DIM instruction when loading DF immediates in HSW
by Samuel Iglesias Gonsálvez
· 8 years ago
3fbdac2
glcpp: Remove illegal characters from tests
by Carl Worth
· 10 years ago
5363518
glcpp: Exhaustively test all legal characters in GLSL
by Carl Worth
· 10 years ago
16b4805
glcpp: Allow vertical tab and form feed characters in GLSL
by Carl Worth
· 10 years ago
6c87624
glcpp: Add testing for no space between macro name and replacement list
by Carl Worth
· 10 years ago
36b5f1d
spirv: compute push constant access offset & range
by Lionel Landwerlin
· 8 years ago
0089085
spirv: move block_size() definition
by Lionel Landwerlin
· 8 years ago
89975e2
va: call texture_get_handle while the mutex is being held
by Marek Olšák
· 8 years ago
dbba4e0
vdpau: call texture_get_handle while the mutex is being held
by Marek Olšák
· 8 years ago
7d48a84
radeonsi: capitalize VM hex addr when dumping buffer list
by Samuel Pitoiset
· 8 years ago
0f991e8
i965: remove unused brwInitVtbl declaration
by Tapani Pälli
· 8 years ago
1a8f262
i965: remove brw_context dependency from intel_batchbuffer_init()
by Iago Toral Quiroga
· 8 years ago
ba30e0c
i965: make intel_batchbuffer_free() take a batchbuffer as argument
by Iago Toral Quiroga
· 8 years ago
1daa31d
i965: make intel_batchbuffer_emit_dword() take a batchbuffer as argument
by Iago Toral Quiroga
· 8 years ago
f03bac1
i965: Make intel_bachbuffer_reloc() take a batchbuffer argument
by Iago Toral Quiroga
· 8 years ago
4b7dfd8
nir: fix loop iteration count calculation for floats
by Timothy Arceri
· 8 years ago
abcaba4
gallium/hud: add a path separator between dump directory and filename
by Edmondo Tommasina
· 8 years ago
e933246
r600/sb: Fix loop optimization related hangs on eg
by Heiko Przybyl
· 8 years ago
dd12119
editorconfig: Fix up the tab rendering width.
by Eric Anholt
· 8 years ago
c4b87f1
meta: Disable dithering during glGenerateMipmap
by Chad Versace
· 8 years ago
8d8ed43
doc/features.txt: update for freedreno
by Romain Failliot
· 8 years ago
96c9ec9
i965: Remove perf monitor/query backend
by Robert Bragg
· 9 years ago
ac57bcd
vl/zscan: fix "Fix trivial sign compare warnings"
by Christian König
· 8 years ago
b6737a8
st/va: error handling
by Nayan Deshmukh
· 8 years ago
29aad4e
st/vdpau: error handling
by Nayan Deshmukh
· 8 years ago
cee5af9
vl/compositor: implement error handling
by Nayan Deshmukh
· 8 years ago
1a83e98
i965/vec4: enable ARB_gpu_shader_fp64 for Haswell
by Iago Toral Quiroga
· 8 years ago
6c350e3
i965/vec4: adjust spilling costs for 64-bit registers.
by Iago Toral Quiroga
· 8 years ago
3cd38b6
i965/vec4: prevent spilling of DOUBLE_TO_SINGLE destination
by Iago Toral Quiroga
· 8 years ago
8843c43
i965/vec4: avoid spilling of registers that mix 32-bit and 64-bit access
by Iago Toral Quiroga
· 8 years ago
82c69426
i965/vec4: support basic spilling of 64-bit registers
by Iago Toral Quiroga
· 8 years ago
c762809
i965/vec4: run scalarize_df() after spilling
by Iago Toral Quiroga
· 8 years ago
7361038
i965/vec4: prevent src/dst hazards during 64-bit register allocation
by Iago Toral Quiroga
· 8 years ago
2b57ada
i965/vec4/scalarize_df: support more swizzles via vstride=0
by Iago Toral Quiroga
· 8 years ago
c3edaca
i965/vec4/scalarize_df: do not scalarize swizzles that we can support natively
by Iago Toral Quiroga
· 8 years ago
2f0bc54
i965/vec4: split instructions that read 64-bit interleaved attributes
by Iago Toral Quiroga
· 8 years ago
0579c85
i965/vec4: dump subnr for FIXED_GRF
by Iago Toral Quiroga
· 8 years ago
8e92b40
i965/vec4/tes: consider register offsets during attribute setup
by Iago Toral Quiroga
· 8 years ago
49d4d02
i965/vec4/tes: fix setup_payload() for 64bit data types
by Iago Toral Quiroga
· 8 years ago
183cd8a
i965/vec4/tes: fix input loading for 64bit data types
by Iago Toral Quiroga
· 8 years ago
3e294ab
i965/vec4/tcs: fix outputs for 64-bit data
by Iago Toral Quiroga
· 8 years ago
639e92e
i965/vec4/tcs: fix input loading for 64-bit data
by Iago Toral Quiroga
· 8 years ago
74fd0c5
i965/vec4/gs: fix input loading for 64bit data
by Samuel Iglesias Gonsálvez
· 8 years ago
b76f220
i965/vec4: fix store output for 64-bit types
by Iago Toral Quiroga
· 8 years ago
5fe8d56
i965/vec4: fix attribute setup for doubles
by Iago Toral Quiroga
· 8 years ago
6a01259
i965/vec4: fix indentation in lower_attributes_to_hw_regs()
by Iago Toral Quiroga
· 8 years ago
ae400e3
i965/vec4: make emit_pull_constant_load support 64-bit loads
by Iago Toral Quiroga
· 8 years ago
df6e3aa
i965/vec4: fix move_push_constants_to_pull_constants() for 64-bit data
by Iago Toral Quiroga
· 8 years ago
eee2c0d
i965/vec4: fix indentation in move_push_constants_to_pull_constants()
by Iago Toral Quiroga
· 8 years ago
10694be
i965/vec4: fix move_uniform_array_access_to_pull_constant() for 64-bit data
by Iago Toral Quiroga
· 8 years ago
52fb22b
i965/vec4: fix scratch writes for 64bit data
by Iago Toral Quiroga
· 8 years ago
dcc36f8
i965/vec4: fix scratch reads for 64bit data
by Iago Toral Quiroga
· 8 years ago
e4d9ab6
i965/vec4: fix scratch offset for 64bit data
by Iago Toral Quiroga
· 8 years ago
07bc6a3
i965/vec4: do not split scratch read/write opcodes
by Iago Toral Quiroga
· 8 years ago
2a85710
i965/vec4: Do not use DepCtrl with 64-bit instructions
by Iago Toral Quiroga
· 8 years ago
506154f
i965/vec4: extend the DWORD multiply DepCtrl restriction to all gen8 platforms
by Iago Toral Quiroga
· 8 years ago
b9cd3f5
i965/vec4: don't copy propagate misaligned registers
by Samuel Iglesias Gonsálvez
· 8 years ago
93eae0d
i965/vec4: don't propagate single-precision uniforms into 4-wide instructions
by Iago Toral Quiroga
· 8 years ago
6637312
i965/vec4: Prevent copy propagation from violating pre-gen8 restrictions
by Iago Toral Quiroga
· 8 years ago
70cc6b0
i965/vec4: prevent copy-propagation from values with a different type size
by Iago Toral Quiroga
· 8 years ago
0fec5e9
i965/vec4: don't constant propagate 64-bit immediates
by Connor Abbott
· 9 years ago
8eea41e
i965/vec4: Fix SSBO stores for 64-bit data
by Iago Toral Quiroga
· 8 years ago
9998d55
i965/vec4: Fix SSBO loads for 64-bit data
by Iago Toral Quiroga
· 8 years ago
4486c90
i965/vec4: Fix UBO loads for 64-bit data
by Iago Toral Quiroga
· 8 years ago
d8e123c
i965/vec4: Add a shuffle_64bit_data helper
by Iago Toral Quiroga
· 8 years ago
017c8df
i965/vec4: support multiple dispatch widths and groups in the IR builder.
by Iago Toral Quiroga
· 8 years ago
b3a7d0e
i965/vec4: Lower 64-bit MAD
by Iago Toral Quiroga
· 8 years ago
82e9dda
i965/vec4/nir: do not emit 64-bit MAD
by Iago Toral Quiroga
· 8 years ago
83dcd14
i965/vec4: Skip swizzle to subnr in 3src instructions with DF operands
by Iago Toral Quiroga
· 8 years ago
49be3ab
i965/vec4: fix indentation in pack_uniform_registers
by Iago Toral Quiroga
· 8 years ago
bdf5498
i965/vec4: fix pack_uniform_registers for doubles
by Iago Toral Quiroga
· 8 years ago
23278a7
i965/vec4: teach register coalescing about 64-bit
by Iago Toral Quiroga
· 8 years ago
7c5bf59
i965/disasm: fix subreg for dst in Align16 mode
by Iago Toral Quiroga
· 8 years ago
ac5a06f
i965/vec4: implement access to DF source components Z/W
by Iago Toral Quiroga
· 8 years ago
e238601
i965/vec4: translate 64-bit swizzles to 32-bit
by Iago Toral Quiroga
· 8 years ago
fb7cb85
i965/vec4: add a scalarization pass for double-precision instructions
by Iago Toral Quiroga
· 8 years ago
f4b8649
i965/vec4: split double-precision SEL
by Iago Toral Quiroga
· 8 years ago
5356d52
i965/vec4: teach cmod propagation about different execution sizes
by Iago Toral Quiroga
· 8 years ago
8f39b36
i965/vec4: teach CSE about exec_size, group and doubles
by Iago Toral Quiroga
· 8 years ago
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