1. 71e6307 r600: set DX10_CLAMP for compute shader too by Roland Scheidegger · 7 years ago
  2. d4c52c5 anv: flag batch & instruction BOs for capture by Lionel Landwerlin · 7 years ago
  3. 118a8c7 anv: setup BO flags at state_pool/block_pool creation by Lionel Landwerlin · 7 years ago
  4. 799d350 r600/shader: Fix all warnings issed with "-Wall -Wextra" by Gert Wollny · 7 years ago
  5. 1d076aa r600: Emit EOP for more CF instruction types by Gert Wollny · 7 years ago
  6. c2dad6c meson: replace with_*dri with with_dri_platform by Dylan Baker · 7 years ago
  7. 33627d2 meson: add logic to select apple and windows dri by Dylan Baker · 7 years ago
  8. 2d1a3bf meson: Fix LLVM requires for radeonsi by Dylan Baker · 7 years ago
  9. 48f64e5 meson: convert llvm option to tristate by Dylan Baker · 7 years ago
  10. 4b61b07 meson: Convert platform to auto by Dylan Baker · 7 years ago
  11. b5d98a1 meson: Remove duplicate _GNU_SOURCE by Dylan Baker · 7 years ago
  12. 9c3e894 meson: Remove completed or irrelevant TODO comments by Dylan Baker · 7 years ago
  13. e89842e meson: Fix TODO for missing dl_iterate_phdr function by Dylan Baker · 7 years ago
  14. 2d62fc0 meson: disable x86 asm in fewer cases. by Dylan Baker · 7 years ago
  15. 84486f6 meson: Enable SSE4.1 optimizations by Dylan Baker · 7 years ago
  16. 6a78416 broadcom/vc5: Fix BASE_LEVEL handling with txl. by Eric Anholt · 7 years ago
  17. c55813c broadcom/vc5: Fix array texture layer count setup. by Eric Anholt · 7 years ago
  18. ad1521d broadcom/vc5: Don't increment primitive queries while they're paused. by Eric Anholt · 7 years ago
  19. 1214c2e broadcom/vc5: Fix incorrect padding of TF outputs. by Eric Anholt · 7 years ago
  20. b18840a broadcom/vc5: Fix UIF surface size setup for ARB_fbo's mismatched sizes. by Eric Anholt · 7 years ago
  21. 9f162fa etnaviv: Put HALTI level in specs by Wladimir J. van der Laan · 7 years ago
  22. 391c958 etnaviv: Const-correctness etnaviv_emit.h by Wladimir J. van der Laan · 7 years ago
  23. 1b0638c meson: add si_driinfo.h in libgallium_dri by Juan A. Suarez Romero · 7 years ago
  24. a217cbd nir/gather_info: recognize load_patch_vertices_in as a system value by Iago Toral Quiroga · 7 years ago
  25. 386f6cd i965: Support decoding INTERFACE_DESCRIPTOR_DATA with INTEL_DEBUG=bat by Jordan Justen · 7 years ago
  26. 2460937 intel/genxml: Add helpers for determining field type by Kristian H. Kristensen · 8 years ago
  27. beaea7a i965/fs: Check ADD/MAD with immediates in satprop unit test by Matt Turner · 7 years ago
  28. a05af1f i965/fs: Handle negating immediates on MADs when propagating saturates by Matt Turner · 7 years ago
  29. ce221cb mesa/teximage: add TEXTURE_CUBE_MAP_ARRAY target for CompressedTexImage3D by Juan A. Suarez Romero · 7 years ago
  30. 6236ffe intel: fix disasm_info memory leaks by Tapani Pälli · 7 years ago
  31. 04a9558 st/glsl_to_nir: don't generate nir twice for gs by Timothy Arceri · 7 years ago
  32. b5957ce llvmpipe: fix snorm blending by Roland Scheidegger · 7 years ago
  33. 464c2d8 r600: add cull distance support by Dave Airlie · 8 years ago
  34. 971b3c0 i965: Optimize bucket index calculation by Aravindan Muthukumar · 7 years ago
  35. c8417c8 meson: Guard the gallium dri componenet by Dylan Baker · 7 years ago
  36. 689fb74 meson: don't build gallium subdir unless we're building gallium by Dylan Baker · 7 years ago
  37. 494effd broadcom/vc5: Align 1D texture miplevels to 64b. by Eric Anholt · 7 years ago
  38. 9d5972d broadcom/vc5: Clamp min lod to the last level. by Eric Anholt · 7 years ago
  39. 2c8913e broadcom/vc5: Increase simulator memory for tex-miplevel-selection. by Eric Anholt · 7 years ago
  40. 34838c2 swr/rast: Repair simd8 frontend code rot by Tim Rowley · 7 years ago
  41. 005d937 swr/rast: Implement AVX-512 GATHERPS in SIMD16 fetch shader by Tim Rowley · 7 years ago
  42. 2e244c7 swr/rast: Simplify GATHER* jit builder api by Tim Rowley · 7 years ago
  43. 44025de swr/rast: Add alignment to transpose targets by Tim Rowley · 7 years ago
  44. bc356b0 swr/rast: Cache eventmanager by Tim Rowley · 7 years ago
  45. 395a298 swr/rast: Enable AVX-512 targets in the jitter by Tim Rowley · 7 years ago
  46. 37bb69f swr/rast: Points with clipdistance can't go through simplepoints path by Tim Rowley · 7 years ago
  47. d9de8f3 swr/rast: Code style change (NFC) by Tim Rowley · 7 years ago
  48. 08512c5 swr/rast: Widen fetch shader to SIMD16 by Tim Rowley · 7 years ago
  49. e612231 swr/rast: Support flexible vertex layout for DS output by Tim Rowley · 7 years ago
  50. 3f17d3c gallium/u_threaded: avoid syncing in threaded_context_flush by Nicolai Hähnle · 7 years ago
  51. bc65dca radeonsi: avoid syncing the driver thread in si_fence_finish by Nicolai Hähnle · 7 years ago
  52. 3db1ce0 radeonsi: recompute the relative timeout after waiting for ready fence by Nicolai Hähnle · 7 years ago
  53. f5ea8d1 ddebug: fix the hang detection timeout calculation by Nicolai Hähnle · 7 years ago
  54. 16f8da2 ddebug: fix use-after-free of streamout targets by Nicolai Hähnle · 7 years ago
  55. aaebf49 gallium/u_threaded: properly initialize fence unflushed tokens by Nicolai Hähnle · 7 years ago
  56. 81aabb2 util/u_queue: really use futex-based fences by Nicolai Hähnle · 7 years ago
  57. a6e8311 util/u_queue: fix timeout handling in util_queue_fence_wait_timeout by Nicolai Hähnle · 7 years ago
  58. 764bd6e st/mesa: use asynchronous flushes in st_finish by Nicolai Hähnle · 7 years ago
  59. 2d8b82b st/mesa: implement st_server_wait_sync properly by Nicolai Hähnle · 7 years ago
  60. ce470af u_threaded_gallium: remove synchronization in fence_server_sync by Nicolai Hähnle · 7 years ago
  61. abeded1 amd: build addrlib with C++11 by Nicolai Hähnle · 7 years ago
  62. df5ebe0 radeonsi/gfx9: fix VM fault with fetched instance divisors by Nicolai Hähnle · 7 years ago
  63. 3a32858 radv: use a 16 bytes array for the sampled/storage image descriptors by Samuel Pitoiset · 7 years ago
  64. bc92ed0 radv: do not add the query pool BO to the list in vkCmdEndQuery() by Samuel Pitoiset · 7 years ago
  65. cf54ea1 radv: only load needed depth clear regs for fast depth clears by Samuel Pitoiset · 7 years ago
  66. e55b760 radv: do not add the image BO in radv_set_depth_clear_regs() by Samuel Pitoiset · 7 years ago
  67. 3c6bba8 radv: remove useless assertion in emit_depthstencil_clear() by Samuel Pitoiset · 7 years ago
  68. 403a3d8 radv: remove useless check in radv_set_depth_clear_regs() by Samuel Pitoiset · 7 years ago
  69. 59ca0c4 docs/features: mark some r600 extensions supported by Dave Airlie · 7 years ago
  70. f09c2ce glsl: Catch subscripted calls to undeclared subroutines by George Barrett · 7 years ago
  71. 514db90 broadcom/vc5: Fix up integer texture handling. by Eric Anholt · 7 years ago
  72. 65ae452 broadcom/vc5: Fix simulator assertion failures about color RT clears. by Eric Anholt · 7 years ago
  73. ae44845 freedreno/ir3: add texture gather support by Rob Clark · 7 years ago
  74. f5d477f etnaviv: enable full overwrite when no color buffer is present by Lucas Stach · 7 years ago
  75. 1eab327 i965: Stop including brw_cfg.h in brw_disasm_info.h by Jason Ekstrand · 7 years ago
  76. 0a6a137 i965: Mark BOs as external when we export their handle by Jason Ekstrand · 7 years ago
  77. 344252a i965/bufmgr: Add a helper to mark a BO as external by Jason Ekstrand · 7 years ago
  78. 1866f7a i965: Correct disasm_info usage in eu_validate test by Andres Gomez · 7 years ago
  79. 8d59940 broadcom/vc5: Set up the padded height at surface creation time. by Eric Anholt · 7 years ago
  80. 87391e2 broadcom/vc5: Ensure that there is always a TLB write. by Eric Anholt · 7 years ago
  81. c40ac13 broadcom/vc5: Fix clear color for swap_color_rb render targets. by Eric Anholt · 7 years ago
  82. 52f3e9e broadcom/vc5: Fix pasteo in front stencil ref value setup. by Eric Anholt · 7 years ago
  83. b63dd62 broadcom/vc5: Fix colormasking when we need to swap r/b colors. by Eric Anholt · 7 years ago
  84. 2daf941 broadcom/vc5: Enable the Z min/max clipping planes. by Eric Anholt · 7 years ago
  85. c259bf6 broadcom/vc5: Fix driver for new PIPE_SHADER_CAP_MAX_HW_ATOMIC_*. by Eric Anholt · 7 years ago
  86. 2b5b6be r300: add PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER* switch cases by Brian Paul · 7 years ago
  87. af322ed tgsi: s/uint/enum pipe_shader_type/ by Brian Paul · 7 years ago
  88. fdee3e1 tgsi: bump tgsi_opcode_info::output_mode size to 4 bits by Brian Paul · 7 years ago
  89. a01ba36 i965: Revert Gen8 aspect of VF PIPE_CONTROL workaround. by Kenneth Graunke · 7 years ago
  90. ddcd4b0 egl: Convert int to attrib in eglGetPlatformDisplay by Adam Jackson · 7 years ago
  91. 1831e3f docs: update features for freedreno by Rob Clark · 7 years ago
  92. 821ec47 i965: Rename intel_asm_annotation -> brw_disasm_info by Matt Turner · 7 years ago
  93. 4f82b17 i965: Rewrite disassembly annotation code by Matt Turner · 7 years ago
  94. f80e973 i965: Simplify annotation_insert_error() by Matt Turner · 7 years ago
  95. f4276ef i965: Move common code out of #ifdef by Matt Turner · 7 years ago
  96. 822fd23 i965: Remove DWord length from MI_FLUSH_DW definition by Anuj Phogat · 7 years ago
  97. a07f7b2 anv/cmd_buffer: Take bo_offset into account in fast clear state addresses by Jason Ekstrand · 7 years ago
  98. a6cc361 anv/cmd_buffer: Advance the address when initializing clear colors by Jason Ekstrand · 7 years ago
  99. 3b7fd35 radeon/video: enable encode support for raven by Boyuan Zhang · 7 years ago
  100. 549a41e radeonsi: enable vcn encode by Boyuan Zhang · 7 years ago