Gitiles
Code Review Sign In
gerrit-public.fairphone.software / platform / external / mesa3d / 968ffd6c868af7226e8f889573eef709888151cb / src / mesa
  1. ce44501 nir/i965: assert first is always less than 64 by Juan A. Suarez Romero · 8 years ago
  2. 75968a6 i965/gen7: expose OpenGL 4.2 on Haswell when supported by Juan A. Suarez Romero · 8 years ago
  3. 7707798 i965: enable ARB_shader_precision to HSW+ by Samuel Iglesias Gonsálvez · 8 years ago
  4. 1d1ddba i965: unify the code to enable of ARB_gpu_shader_fp64 and ARB_vertex_attrib_64bit for HSW+ by Samuel Iglesias Gonsálvez · 8 years ago
  5. 485955b i965: Enable ARB_vertex_attrib_64bit for Haswell by Alejandro Piñeiro · 8 years ago
  6. 6bb4255 i965: check for dual slot attributes on any gen by Juan A. Suarez Romero · 8 years ago
  7. f51a5b5 i965/vec4: emit correctly load_inputs for 64bit data by Juan A. Suarez Romero · 8 years ago
  8. 58fdb85 i965/vec4: take into account doubles when creating attribute mapping by Alejandro Piñeiro · 9 years ago
  9. 57bab67 i965/vec4/nir: vec4 also needs to remap vs attributes by Alejandro Piñeiro · 9 years ago
  10. f831018 i965/vec4: use attribute slots for first non payload GRF by Alejandro Piñeiro · 9 years ago
  11. 329cbe3 i965: downsize *64*PASSTHRU formats to equivalent *32*FLOAT formats on gen < 8 by Alejandro Piñeiro · 9 years ago
  12. 717f99b i965: return PASSTHRU surface types also on gen7 by Alejandro Piñeiro · 9 years ago
  13. f354cd5 main/buffers: take into account FRONT_AND_BACK on ReadBuffer by Alejandro Piñeiro · 8 years ago
  14. d54bc7e main/buffers: update error handling on DrawBuffers for 4.5 by Alejandro Piñeiro · 8 years ago
  15. ea7e4b1 i965: Enable predicate support on gen >= 8. by Rafael Antognolli · 8 years ago
  16. b4c44ff i965: Use the nir_move_comparisons pass. by Kenneth Graunke · 8 years ago
  17. b5e682a i965: Move nir_lower_locals_to_regs a bit later. by Kenneth Graunke · 8 years ago
  18. eca79e8 android: st/mesa: fix building error in libmesa_st_mesa by Mauro Rossi · 8 years ago
  19. 5edc338 compiler: Merge shader_info's tcs and tes structs. by Kenneth Graunke · 8 years ago
  20. 2bae2fa i965: Fix number of slots in SSO mode when there are no user varyings. by Kenneth Graunke · 8 years ago
  21. 230b756 mesa: set GLSL 1.20 for the fixed-function fragment shader by Marek Olšák · 8 years ago
  22. c2acf97 nir/i965: use two slots from inputs_read for dvec3/dvec4 vertex input attributes by Juan A. Suarez Romero · 8 years ago
  23. 8b43f42 i965: call intel_prepare_render always when reading pixels by Tapani Pälli · 8 years ago
  24. 953e4e4 st/mesa: pass gl_program to st_bind_ubos() by Timothy Arceri · 8 years ago
  25. 270e584 st/mesa: pass gl_program to st_bind_images() by Timothy Arceri · 8 years ago
  26. 59ac77b st/mesa: stop passing gl_linked_shader to set_affected_state_flags() by Timothy Arceri · 8 years ago
  27. ae632af st/mesa/glsl: set num_images directly in shader_info by Timothy Arceri · 8 years ago
  28. 4b30011 st/mesa: pass gl_program to st_bind_ssbos() by Timothy Arceri · 8 years ago
  29. 86b9be7 i965: Move TES input VUE map calculation out a layer. by Kenneth Graunke · 9 years ago
  30. 6e8ac06 i965: Pass NULL for gl_program when compiling TES. by Kenneth Graunke · 9 years ago
  31. 08f8f1b i965: Move TES spacing/domain/topology setup to brw_compile_tes(). by Kenneth Graunke · 8 years ago
  32. cc2df4b i965: Access TES shader info via NIR. by Kenneth Graunke · 8 years ago
  33. a4fd84e mesa: Introduce a compiler enum for tessellation spacing. by Kenneth Graunke · 8 years ago
  34. 9bb8917 compiler: Change shader_info->tes.vertex_order into a ccw boolean. by Kenneth Graunke · 8 years ago
  35. 5a165b4 drirc: Allow extension midshader for Divinity: Original Sin (EE) by Kai Wasserbäch · 8 years ago
  36. 45912fb i965/compiler: Use the new nir_opt_copy_prop_vars pass by Jason Ekstrand · 8 years ago
  37. e6ae199 i965: Rework gl_TessLevel*[] handling to use NIR compact arrays. by Kenneth Graunke · 8 years ago
  38. 31d9de5 i965: Inline store_output helper in quads workaround code. by Kenneth Graunke · 8 years ago
  39. 496693d i965: Make unify_interfaces not spread VARYING_BIT_TESS_LEVEL_*. by Kenneth Graunke · 8 years ago
  40. a46bd79 glsl: Support gl_TessLevelInner/Outer[] as TES input variables. by Kenneth Graunke · 8 years ago
  41. 1472ff3 i965: Enable several GLES 3.1 extensions on HSW+ by Ian Romanick · 8 years ago
  42. 90c51cc i965: Always set MaxViewports and related limits by Ian Romanick · 8 years ago
  43. 2138347 i965: Properly flush in hsw_pause_transform_feedback(). by Kenneth Graunke · 8 years ago
  44. 4295af6 i965: Fix texturing in the vec4 TCS and GS backends. by Kenneth Graunke · 8 years ago
  45. a4d6f4d i965: Don't set EmitNoMainReturn. by Kenneth Graunke · 8 years ago
  46. 076ab15 st/mesa/glsl: move SamplerTargets to gl_program by Timothy Arceri · 8 years ago
  47. 9375239 st/mesa/glsl: set SamplersUsed directly in gl_program by Timothy Arceri · 8 years ago
  48. 53a5097 mesa/glsl: set sampler units directly in gl_program by Timothy Arceri · 8 years ago
  49. 7cc61cf mesa: simplify sampler setting code by Timothy Arceri · 8 years ago
  50. 4807a83 mesa/glsl: set num_textures per stage directly in shader_info by Timothy Arceri · 8 years ago
  51. c46a630 mesa: make _CurrentFragmentProgram a gl_program struct pointer by Timothy Arceri · 8 years ago
  52. 6e3f609 i965: stop passing gl_shader_program to the precompile and codegen functions by Timothy Arceri · 8 years ago
  53. 5ceedef mesa/glsl: remove hack to reset sampler units to zero by Timothy Arceri · 8 years ago
  54. 2384868 i965: make use of new is_arb_asm flag by Timothy Arceri · 8 years ago
  55. f584f38 st/mesa/glsl: add new is_arb_asm flag in gl_program by Timothy Arceri · 8 years ago
  56. 2784128 i965: pass gl_program directly to brw_compile_tes() by Timothy Arceri · 8 years ago
  57. 2a4d169 i965: stop passing gl_shader_program to brw_nir_setup_glsl_uniforms() by Timothy Arceri · 8 years ago
  58. d3b2ee6 i965: pass gl_program to brw_upload_ubo_surfaces() by Timothy Arceri · 8 years ago
  59. 9ca14f5 i965: stop passing gl_shader_program to brw_assign_common_binding_table_offsets() by Timothy Arceri · 8 years ago
  60. f5bc127 st/mesa/glsl/i965: move ShaderStorageBlocks to gl_program by Timothy Arceri · 8 years ago
  61. f62eb6c st/mesa/glsl/i965: set num_ssbos directly in shader_info by Timothy Arceri · 8 years ago
  62. 0e7eec1 st/mesa/glsl/i965: move per stage UniformBlocks to gl_program by Timothy Arceri · 8 years ago
  63. b792c38 st/mesa/glsl/i965: set num_ubos directly in shader_info by Timothy Arceri · 8 years ago
  64. a1da57c st/mesa/glsl/i965: move ImageUnits and ImageAccess fields to gl_program by Timothy Arceri · 8 years ago
  65. 3d2485f i965: get InfoLog and LinkStatus via the pointer in gl_program by Timothy Arceri · 8 years ago
  66. be9a6a7 i965: get shared_size from shader_info rather than gl_shader_program by Timothy Arceri · 8 years ago
  67. 234211e i965: stop depending on gl_shader_program for brw_compute_vue_map() params by Timothy Arceri · 8 years ago
  68. 6f76ca3 i965: pass gl_program to the brw_*_debug_recompile() functions by Timothy Arceri · 8 years ago
  69. d995115 gallium: remove TGSI_OPCODE_SUB by Marek Olšák · 8 years ago
  70. a4ace98 gallium: remove TGSI_OPCODE_ABS by Marek Olšák · 8 years ago
  71. 3477f67 st/mesa: fix a segfault when prog->sh.data is NULL by Marek Olšák · 8 years ago
  72. c7affbf st/mesa: enable GLSLOptimizeConservatively for drivers that want it by Marek Olšák · 8 years ago
  73. 96fe883 glsl_to_tgsi: do fewer optimizations with GLSLOptimizeConservatively by Marek Olšák · 8 years ago
  74. 0a5018c mesa: add gl_constants::GLSLOptimizeConservatively by Marek Olšák · 8 years ago
  75. d3cb79e glsl: run do_lower_jumps properly in do_common_optimizations by Marek Olšák · 8 years ago
  76. 7c6b714 i965: Print VS output VUE map in Vulkan too. by Kenneth Graunke · 8 years ago
  77. 480d6c1 i965: Fix last slot calculations by Kenneth Graunke · 8 years ago
  78. a98f2e5 i965: add a kernel_features bitfield to intel screen by Iago Toral Quiroga · 8 years ago
  79. e3123c8 i965/gen7: Enable OpenGL 4.0 in Haswell when supported by Iago Toral Quiroga · 8 years ago
  80. 1f1b8de i965: get rid of brw->can_do_pipelined_register_writes by Iago Toral Quiroga · 8 years ago
  81. 02a4448 i965: Move the pipelined test for SO register access to the screen by Chris Wilson · 8 years ago
  82. ab1ec7d i965/disasm: remove printing hstride and width in align16 DF source regions by Samuel Iglesias Gonsálvez · 8 years ago
  83. 301fdfd vec4: use DIM instruction when loading DF immediates in HSW by Samuel Iglesias Gonsálvez · 8 years ago
  84. 0f991e8 i965: remove unused brwInitVtbl declaration by Tapani Pälli · 8 years ago
  85. 1a8f262 i965: remove brw_context dependency from intel_batchbuffer_init() by Iago Toral Quiroga · 8 years ago
  86. ba30e0c i965: make intel_batchbuffer_free() take a batchbuffer as argument by Iago Toral Quiroga · 8 years ago
  87. 1daa31d i965: make intel_batchbuffer_emit_dword() take a batchbuffer as argument by Iago Toral Quiroga · 8 years ago
  88. f03bac1 i965: Make intel_bachbuffer_reloc() take a batchbuffer argument by Iago Toral Quiroga · 8 years ago
  89. c4b87f1 meta: Disable dithering during glGenerateMipmap by Chad Versace · 8 years ago
  90. 96c9ec9 i965: Remove perf monitor/query backend by Robert Bragg · 10 years ago
  91. 1a83e98 i965/vec4: enable ARB_gpu_shader_fp64 for Haswell by Iago Toral Quiroga · 8 years ago
  92. 6c350e3 i965/vec4: adjust spilling costs for 64-bit registers. by Iago Toral Quiroga · 8 years ago
  93. 3cd38b6 i965/vec4: prevent spilling of DOUBLE_TO_SINGLE destination by Iago Toral Quiroga · 8 years ago
  94. 8843c43 i965/vec4: avoid spilling of registers that mix 32-bit and 64-bit access by Iago Toral Quiroga · 8 years ago
  95. 82c69426 i965/vec4: support basic spilling of 64-bit registers by Iago Toral Quiroga · 8 years ago
  96. c762809 i965/vec4: run scalarize_df() after spilling by Iago Toral Quiroga · 8 years ago
  97. 7361038 i965/vec4: prevent src/dst hazards during 64-bit register allocation by Iago Toral Quiroga · 8 years ago
  98. 2b57ada i965/vec4/scalarize_df: support more swizzles via vstride=0 by Iago Toral Quiroga · 8 years ago
  99. c3edaca i965/vec4/scalarize_df: do not scalarize swizzles that we can support natively by Iago Toral Quiroga · 8 years ago
  100. 2f0bc54 i965/vec4: split instructions that read 64-bit interleaved attributes by Iago Toral Quiroga · 8 years ago