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gerrit-public.fairphone.software / platform / external / mesa3d / f1b5f2b157a092e93590bd43544fbf2671edab36
  1. f1b5f2b mesa: use build flag to ensure stack is realigned on x86 by Timothy Arceri · 10 years ago
  2. 65ef78e draw: implement TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION by Marek Olšák · 10 years ago
  3. 6cc7251 main: return two minor digits for ES shading language version by Samuel Iglesias Gonsalvez · 10 years ago
  4. 426a50e glsl: invariant qualifier is not valid for shader inputs in GLSL ES 3.00 by Samuel Iglesias Gonsalvez · 10 years ago
  5. e1ed4f2 mesa: Recompute LegalTypesMask if the GL API has changed by Iago Toral Quiroga · 10 years ago
  6. 09cb149 mesa: Returns zero samples when querying GL_NUM_SAMPLE_COUNTS when internal format is integer by Eduardo Lima Mitev · 10 years ago
  7. 7894278 mesa: Enables GL_RGB and GL_RGBA unsized internal formats for OpenGL ES 3.0 by Eduardo Lima Mitev · 10 years ago
  8. 242ad32 mesa: Considers GL_DEPTH_STENCIL_ATTACHMENT a valid argument for FBO invalidation under GLES3 by Eduardo Lima Mitev · 10 years ago
  9. 8420a95 vc4: Reserve rb31 instead of r3 for raddr conflict spills. by Eric Anholt · 10 years ago
  10. ab1b1fa vc4: Prioritize allocating accumulators to short-lived values. by Eric Anholt · 10 years ago
  11. 0d4272c r600g: fix regression since UCMP change by Dave Airlie · 10 years ago
  12. 2a0bef9 program: Delete dead _mesa_realloc_instructions. by Matt Turner · 10 years ago
  13. 811a1836 swrast: Remove 'inline' from tex filter functions. by Matt Turner · 10 years ago
  14. 8af4aaf Don't cast the return value of malloc/realloc by Matt Turner · 10 years ago
  15. f0a8bcd Use calloc instead of malloc/memset-0 by Matt Turner · 10 years ago
  16. 9019e5e Remove useless checks for NULL before freeing by Matt Turner · 10 years ago
  17. cae7a2a i965/skl: Add Skylake PCI IDs by Kristian Høgsberg · 10 years ago
  18. 5bad948 i965/skl: Emit depth stall workaround for gen9 as well by Damien Lespiau · 12 years ago
  19. 9404494 i965/skl: Fix GS thread count location by Ben Widawsky · 10 years ago
  20. d20235f i965: Fix union usage for G++ <= 4.6. by Vinson Lee · 10 years ago
  21. 70dd3df vc4: Interleave register allocation from regfile A and B. by Eric Anholt · 10 years ago
  22. 46741c1 vc4: Fix decision for whether the MIN operation writes to the B regfile. by Eric Anholt · 10 years ago
  23. 24c5ab7 vc4: Drop dependency on r3 for color packing. by Eric Anholt · 10 years ago
  24. dfbf58c vc4: Add support for GL 1.0 logic ops. by Eric Anholt · 10 years ago
  25. 5045d8c vc4: Add support for TGSI_OPCODE_UCMP. by Eric Anholt · 10 years ago
  26. c164361 radeonsi/compute: Clamp COMPUTE_TMPRING_SIZE.WAVES to: num_cu * 32 by Tom Stellard · 10 years ago
  27. 0e1c085 winsys/radeon: Always report at least 1 compute unit by Tom Stellard · 10 years ago
  28. 67dcbcd radeonsi: Program RASTER_CONFIG for harvested GPUs v5 by Tom Stellard · 10 years ago
  29. fea5c26 draw: (trivial): remove double semicolon by Roland Scheidegger · 10 years ago
  30. 49e0431 st/mesa: For vertex shaders, don't emit saturate when SM 3.0 is unsupported by Abdiel Janulgue · 10 years ago
  31. 4ea8c8d glsl: Don't optimize min/max into saturate when EmitNoSat is set by Abdiel Janulgue · 10 years ago
  32. 39f7b72 ir_to_mesa: Remove sat to clamp lowering pass by Abdiel Janulgue · 10 years ago
  33. 5d64da4 loader: Add missing EXPAT_CFLAGS to libloader.la CPPFLAGS by Michael Forney · 10 years ago
  34. f65200c i965: Remove default from brw_instruction_name switch to catch missing names. by Matt Turner · 10 years ago
  35. b6a71cb i965: Add missing opcode names. by Matt Turner · 10 years ago
  36. 6383e20 i965: Add opcode names for set_omask and set_sample_id. by Matt Turner · 10 years ago
  37. 7e8ba77 egl: Expose EGL_KHR_get_all_proc_addresses and its client extension by Chad Versace · 10 years ago
  38. 0b6e0aa docs: add news item and link release notes for mesa 10.3.5 by Emil Velikov · 10 years ago
  39. 7409ad5 docs: Add sha256 sums for the 10.3.5 release by Emil Velikov · 10 years ago
  40. 8d235e0 Add release notes for the 10.3.5 release by Emil Velikov · 10 years ago
  41. 043b794 freedreno/a2xx: silence warning about missing DEPTH32X by Ilia Mirkin · 10 years ago
  42. c416f49 freedreno/a3xx: handle index_bias (i.e. base_vertex) by Ilia Mirkin · 10 years ago
  43. b38b40d freedreno/a3xx: add bgr565 texturing and rendering by Ilia Mirkin · 10 years ago
  44. e02ed16 freedreno/a3xx: add support for SRGB render targets by Ilia Mirkin · 10 years ago
  45. 39a7c04 freedreno/a3xx: output RGBA16_FLOAT from fs for certain outputs by Ilia Mirkin · 10 years ago
  46. 3674c76 freedreno/a3xx: re-enable rgb10_a2 render targets by Ilia Mirkin · 10 years ago
  47. fc94b2c freedreno/a3xx: fix border color swizzle to match texture format desc by Ilia Mirkin · 10 years ago
  48. 97fef2d freedreno/a3xx: fix alpha-blending on RGBX formats by Ilia Mirkin · 10 years ago
  49. 6b01969 glcpp: Fix `can not` to `cannot` in error message by Chris Forbes · 10 years ago
  50. b49a069 glcpp: Disallow undefining GL_* builtin macros. by Chris Forbes · 10 years ago
  51. ed56c16 i965/Gen6-7: Fix point sprites with PolygonMode(GL_POINT) by Chris Forbes · 10 years ago
  52. 092c73a i965: Fix regs read for FS_OPCODE_INTERP_PER_SLOT_OFFSET by Chris Forbes · 10 years ago
  53. 680f72d i965: Add opcode names for FS interpolation opcodes by Chris Forbes · 10 years ago
  54. d8da6de mesa/st: don't use CMP / I2F for conditional assignments with native integers by Roland Scheidegger · 10 years ago
  55. 6f2cf5f llvmpipe: decrease MAX_SCENES from 2 to 1 by Roland Scheidegger · 10 years ago
  56. 1b6db35 draw: use the prim type from prim_info not emit in passthrough emit by Roland Scheidegger · 10 years ago
  57. fe86415 draw: use correct output prim for non-adjacent topologies in prim assembler. by Roland Scheidegger · 10 years ago
  58. 3fdbad1 draw: kill off unneded prim assembler code for handling adjacency verts by Roland Scheidegger · 10 years ago
  59. ec30c66 gallium/docs: (trivial) remove STR opcode description. by Roland Scheidegger · 10 years ago
  60. a28ad9d i965/fs: Perform CSE on MOV ..., VF instructions. by Matt Turner · 11 years ago
  61. 963a3c7 i965/fs: Try to emit LINE instructions on Gen <= 5. by Matt Turner · 11 years ago
  62. 6be863a i965/fs: Add support for generating the LINE instruction. by Matt Turner · 11 years ago
  63. 92346db i965: Set the region of LINE's src0 to <0,1,0>. by Matt Turner · 10 years ago
  64. 9ed8d00 i965: Give compile stats through KHR_debug. by Matt Turner · 10 years ago
  65. 5b1e51b mesa: Add a source parameter to _mesa_gl_debug. by Matt Turner · 10 years ago
  66. befdff8 vc4: Try swapping the regfile A to B to pair instructions. by Eric Anholt · 10 years ago
  67. 7d8b79f vc4: Allow pairing of some instructions that disagree about the WS bit. by Eric Anholt · 10 years ago
  68. e36c651 configure.ac: Replace contraction to fix syntax highlighting. by Matt Turner · 10 years ago
  69. f13870d i965/gs: Avoid DW * DW mul by Ben Widawsky · 10 years ago
  70. 6f32deb vc4: Add separate write-after-read dependency tracking for pairing. by Eric Anholt · 10 years ago
  71. 042962d vc4: Fix inverted priority of instructions for QPU scheduling. by Eric Anholt · 10 years ago
  72. bd4057a vc4: Refuse to merge two ops that both access shared functions. by Eric Anholt · 10 years ago
  73. dadc32a vc4: Allow dead code elimination of color reads. by Eric Anholt · 10 years ago
  74. 34cf86b vc4: Add a debug flag for waiting for sync on submit. by Eric Anholt · 10 years ago
  75. c0e26c5 i965/fs: Move brw_file_from_reg() higher in the file. by Matt Turner · 10 years ago
  76. db186f2 i965/fs: Make brw_reg_from_fs_reg static and remove prototype. by Matt Turner · 10 years ago
  77. 2881b12 i965: Use ~0 to represent true on all generations. by Matt Turner · 10 years ago
  78. 05e2578 i965: Change the type of booleans to D. by Matt Turner · 10 years ago
  79. 66cc8de i965/fs: Add a negate() function. by Matt Turner · 10 years ago
  80. 15f6118 i965/vec4: Don't DCE flag-writing insts because dest was unused. by Matt Turner · 10 years ago
  81. 0d3cc01 i965/vec4: Allow CSE on uniform-vec4 expansion MOVs. by Matt Turner · 10 years ago
  82. be80f69 glsl: Optimize scalar all_equal/any_nequal into equal/nequal. by Matt Turner · 10 years ago
  83. a1fc6a9 mesa: Ensure stack is realigned on x86. by José Fonseca · 10 years ago
  84. f9098f0 util/primconvert: Avoid point arithmetic; apply offset on all cases. by José Fonseca · 10 years ago
  85. c3bed13 util/primconvert: take ib offset into account by Ilia Mirkin · 10 years ago
  86. fb434e6 util/primconvert: support instanced rendering by Ilia Mirkin · 10 years ago
  87. 1dfa039 util/primconvert: pass index bias through by Ilia Mirkin · 10 years ago
  88. ae45a5a i965: Compute VS attribute WA bits earlier and check if they changed. by Kenneth Graunke · 10 years ago
  89. 0b4a688 egl/dri2: Log a warning if no platforms are enabled. by Matt Turner · 10 years ago
  90. ca19e89 i965: Drop BRW_NEW_VERTEX_PROGRAM and _NEW_TRANSFORM from Gen4 VS state. by Kenneth Graunke · 10 years ago
  91. a2dd8ea i965: Drop BRW_NEW_VERTEX_PROGRAM from Gen7+ 3DSTATE_VS atoms. by Kenneth Graunke · 10 years ago
  92. 7b6620f i965: Store floating point mode choice in brw_stage_prog_data. by Kenneth Graunke · 10 years ago
  93. d300e58 i965: Make Gen4-5 and Gen8+ ALT checks use ctx->_Shader too. by Kenneth Graunke · 10 years ago
  94. 8daf3c5 i965: Move PSCDEPTH calculations from draw time to compile time. by Kenneth Graunke · 10 years ago
  95. 4265148 freedreno/a4xx: unify vertex/texture formats into a single table by Rob Clark · 10 years ago
  96. e9589a8 freedreno/a4xx: fd4_util -> fd4_format by Rob Clark · 10 years ago
  97. 8bf69a2 freedreno: update generated headers / a4xx fmt rename by Rob Clark · 10 years ago
  98. bcc7eb1 i965: Add var->location != -1 assertions. by Kenneth Graunke · 10 years ago
  99. b5b18e4 i965/fs: Don't offset uniform registers in half(). by Matt Turner · 10 years ago
  100. c74f2db freedreno/a4xx: frag-depth fixes by Rob Clark · 10 years ago