minigbm: move tegra_bo_import to be above tegra_bo_map, and run clang-format
IMO this looks nicer.
BUG=chromium:764871
TEST=gbmtest on Tegra
Change-Id: I7839b5a348f95f38385a555a8fe3ab0982d3533f
Reviewed-on: https://chromium-review.googlesource.com/668217
Commit-Ready: Gurchetan Singh <gurchetansingh@chromium.org>
Tested-by: Gurchetan Singh <gurchetansingh@chromium.org>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
diff --git a/i915.c b/i915.c
index cbd6c6b..2b9d775 100644
--- a/i915.c
+++ b/i915.c
@@ -218,7 +218,7 @@
case DRM_FORMAT_YVU420_ANDROID:
case DRM_FORMAT_YVU420:
horizontal_alignment *= 2;
- /* Fall through */
+ /* Fall through */
case DRM_FORMAT_NV12:
vertical_alignment *= 2;
break;
diff --git a/tegra.c b/tegra.c
index 7ddeb96..fe20fad 100644
--- a/tegra.c
+++ b/tegra.c
@@ -265,6 +265,41 @@
return 0;
}
+static int tegra_bo_import(struct bo *bo, struct drv_import_fd_data *data)
+{
+ int ret;
+ struct drm_tegra_gem_get_tiling gem_get_tiling;
+
+ ret = drv_prime_bo_import(bo, data);
+ if (ret)
+ return ret;
+
+ /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
+ memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
+ gem_get_tiling.handle = bo->handles[0].u32;
+
+ ret = drmIoctl(bo->drv->fd, DRM_IOCTL_TEGRA_GEM_GET_TILING, &gem_get_tiling);
+ if (ret) {
+ drv_gem_bo_destroy(bo);
+ return ret;
+ }
+
+ /* NOTE(djmk): we only know about one tiled format, so if our drmIoctl call tells us we are
+ tiled, assume it is this format (NV_MEM_KIND_C32_2CRA) otherwise linear (KIND_PITCH). */
+ if (gem_get_tiling.mode == DRM_TEGRA_GEM_TILING_MODE_PITCH) {
+ bo->tiling = NV_MEM_KIND_PITCH;
+ } else if (gem_get_tiling.mode == DRM_TEGRA_GEM_TILING_MODE_BLOCK) {
+ bo->tiling = NV_MEM_KIND_C32_2CRA;
+ } else {
+ fprintf(stderr, "tegra_bo_import: unknown tile format %d", gem_get_tiling.mode);
+ drv_gem_bo_destroy(bo);
+ assert(0);
+ }
+
+ bo->format_modifiers[0] = fourcc_mod_code(NV, bo->tiling);
+ return 0;
+}
+
static void *tegra_bo_map(struct bo *bo, struct map_info *data, size_t plane, int prot)
{
int ret;
@@ -311,41 +346,6 @@
return munmap(data->addr, data->length);
}
-static int tegra_bo_import(struct bo *bo, struct drv_import_fd_data *data)
-{
- int ret;
- struct drm_tegra_gem_get_tiling gem_get_tiling;
-
- ret = drv_prime_bo_import(bo, data);
- if (ret)
- return ret;
-
- /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
- memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
- gem_get_tiling.handle = bo->handles[0].u32;
-
- ret = drmIoctl(bo->drv->fd, DRM_IOCTL_TEGRA_GEM_GET_TILING, &gem_get_tiling);
- if (ret) {
- drv_gem_bo_destroy(bo);
- return ret;
- }
-
- /* NOTE(djmk): we only know about one tiled format, so if our drmIoctl call tells us we are
- tiled, assume it is this format (NV_MEM_KIND_C32_2CRA) otherwise linear (KIND_PITCH). */
- if (gem_get_tiling.mode == DRM_TEGRA_GEM_TILING_MODE_PITCH) {
- bo->tiling = NV_MEM_KIND_PITCH;
- } else if (gem_get_tiling.mode == DRM_TEGRA_GEM_TILING_MODE_BLOCK) {
- bo->tiling = NV_MEM_KIND_C32_2CRA;
- } else {
- fprintf(stderr, "tegra_bo_import: unknown tile format %d", gem_get_tiling.mode);
- drv_gem_bo_destroy(bo);
- assert(0);
- }
-
- bo->format_modifiers[0] = fourcc_mod_code(NV, bo->tiling);
- return 0;
-}
-
struct backend backend_tegra = {
.name = "tegra",
.init = tegra_init,