Niklas Schulze | 878fed4 | 2017-02-08 15:29:21 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2017 The Chromium OS Authors. All rights reserved. |
| 3 | * Use of this source code is governed by a BSD-style license that can be |
| 4 | * found in the LICENSE file. |
| 5 | */ |
| 6 | |
| 7 | #ifdef DRV_VC4 |
| 8 | |
| 9 | #include <stdio.h> |
| 10 | #include <string.h> |
| 11 | #include <sys/mman.h> |
| 12 | #include <vc4_drm.h> |
| 13 | #include <xf86drm.h> |
| 14 | |
| 15 | #include "drv_priv.h" |
| 16 | #include "helpers.h" |
| 17 | #include "util.h" |
| 18 | |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 19 | static const uint32_t supported_formats[] = { |
| 20 | DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888 |
Niklas Schulze | 878fed4 | 2017-02-08 15:29:21 +0100 | [diff] [blame] | 21 | }; |
| 22 | |
| 23 | static int vc4_init(struct driver *drv) |
| 24 | { |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 25 | return drv_add_linear_combinations(drv, supported_formats, |
| 26 | ARRAY_SIZE(supported_formats)); |
Niklas Schulze | 878fed4 | 2017-02-08 15:29:21 +0100 | [diff] [blame] | 27 | } |
| 28 | |
| 29 | static int vc4_bo_create(struct bo *bo, uint32_t width, uint32_t height, |
| 30 | uint32_t format, uint32_t flags) |
| 31 | { |
| 32 | int ret; |
| 33 | size_t plane; |
Gurchetan Singh | 6423ecb | 2017-03-29 08:23:40 -0700 | [diff] [blame] | 34 | uint32_t stride; |
Niklas Schulze | 878fed4 | 2017-02-08 15:29:21 +0100 | [diff] [blame] | 35 | struct drm_vc4_create_bo bo_create; |
| 36 | |
Gurchetan Singh | 6423ecb | 2017-03-29 08:23:40 -0700 | [diff] [blame] | 37 | /* |
| 38 | * Since the ARM L1 cache line size is 64 bytes, align to that as a |
| 39 | * performance optimization. |
| 40 | */ |
| 41 | stride = drv_stride_from_format(format, width, 0); |
| 42 | stride = ALIGN(stride, 64); |
| 43 | drv_bo_from_format(bo, stride, height, format); |
Niklas Schulze | 878fed4 | 2017-02-08 15:29:21 +0100 | [diff] [blame] | 44 | |
| 45 | memset(&bo_create, 0, sizeof(bo_create)); |
| 46 | bo_create.size = bo->total_size; |
| 47 | |
| 48 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VC4_CREATE_BO, &bo_create); |
| 49 | if (ret) { |
| 50 | fprintf(stderr, "drv: DRM_IOCTL_VC4_GEM_CREATE failed " |
| 51 | "(size=%zu)\n", bo->total_size); |
| 52 | return ret; |
| 53 | } |
| 54 | |
| 55 | for (plane = 0; plane < bo->num_planes; plane++) |
| 56 | bo->handles[plane].u32 = bo_create.handle; |
| 57 | |
| 58 | return 0; |
| 59 | } |
| 60 | |
| 61 | static void *vc4_bo_map(struct bo *bo, struct map_info *data, size_t plane) |
| 62 | { |
| 63 | int ret; |
| 64 | struct drm_vc4_mmap_bo bo_map; |
| 65 | |
| 66 | memset(&bo_map, 0, sizeof(bo_map)); |
| 67 | bo_map.handle = bo->handles[0].u32; |
| 68 | |
| 69 | ret = drmCommandWriteRead(bo->drv->fd, DRM_VC4_MMAP_BO, &bo_map, |
| 70 | sizeof(bo_map)); |
| 71 | if (ret) { |
| 72 | fprintf(stderr, "drv: DRM_VC4_MMAP_BO failed\n"); |
| 73 | return MAP_FAILED; |
| 74 | } |
| 75 | |
| 76 | data->length = bo->total_size; |
| 77 | |
| 78 | return mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED, |
| 79 | bo->drv->fd, bo_map.offset); |
| 80 | } |
| 81 | |
| 82 | struct backend backend_vc4 = |
| 83 | { |
| 84 | .name = "vc4", |
| 85 | .init = vc4_init, |
| 86 | .bo_create = vc4_bo_create, |
| 87 | .bo_import = drv_prime_bo_import, |
| 88 | .bo_destroy = drv_gem_bo_destroy, |
| 89 | .bo_map = vc4_bo_map, |
| 90 | }; |
| 91 | |
| 92 | #endif |