blob: 98ce8c66cb5a27001f2ec22eae3d2150aa26008f [file] [log] [blame]
Gurchetan Singhd6b8b032017-05-31 14:31:31 -07001/*
2 * Copyright 2016 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Gurchetan Singhbc4f0232019-06-27 20:05:54 -07007#include "../../util.h"
Gurchetan Singhd6b8b032017-05-31 14:31:31 -07008#include "../cros_gralloc_driver.h"
9
Tomasz Mikolajewskica2938a2017-11-17 20:30:56 +090010#include <cassert>
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070011#include <hardware/gralloc.h>
12#include <memory.h>
13
14struct gralloc0_module {
15 gralloc_module_t base;
16 std::unique_ptr<alloc_device_t> alloc;
17 std::unique_ptr<cros_gralloc_driver> driver;
Gurchetan Singhbcfd7582017-08-01 15:02:24 -070018 bool initialized;
19 std::mutex initialization_mutex;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070020};
21
22/* This enumeration must match the one in <gralloc_drm.h>.
23 * The functions supported by this gralloc's temporary private API are listed
24 * below. Use of these functions is highly discouraged and should only be
25 * reserved for cases where no alternative to get same information (such as
26 * querying ANativeWindow) exists.
27 */
28// clang-format off
29enum {
30 GRALLOC_DRM_GET_STRIDE,
31 GRALLOC_DRM_GET_FORMAT,
32 GRALLOC_DRM_GET_DIMENSIONS,
33 GRALLOC_DRM_GET_BACKING_STORE,
34};
35// clang-format on
36
David Stevens6116b312019-09-03 10:49:50 +090037// Gralloc0 doesn't define a video decoder flag. However, the IAllocator gralloc0
38// passthrough gives the low 32-bits of the BufferUsage flags to gralloc0 in their
39// entirety, so we can detect the video decoder flag passed by IAllocator clients.
40#define BUFFER_USAGE_VIDEO_DECODER (1 << 22)
41
Gurchetan Singha1892b22017-09-28 16:40:52 -070042static uint64_t gralloc0_convert_usage(int usage)
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070043{
Gurchetan Singha1892b22017-09-28 16:40:52 -070044 uint64_t use_flags = BO_USE_NONE;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070045
Gurchetan Singha1892b22017-09-28 16:40:52 -070046 if (usage & GRALLOC_USAGE_CURSOR)
47 use_flags |= BO_USE_NONE;
48 if ((usage & GRALLOC_USAGE_SW_READ_MASK) == GRALLOC_USAGE_SW_READ_RARELY)
49 use_flags |= BO_USE_SW_READ_RARELY;
50 if ((usage & GRALLOC_USAGE_SW_READ_MASK) == GRALLOC_USAGE_SW_READ_OFTEN)
51 use_flags |= BO_USE_SW_READ_OFTEN;
52 if ((usage & GRALLOC_USAGE_SW_WRITE_MASK) == GRALLOC_USAGE_SW_WRITE_RARELY)
53 use_flags |= BO_USE_SW_WRITE_RARELY;
54 if ((usage & GRALLOC_USAGE_SW_WRITE_MASK) == GRALLOC_USAGE_SW_WRITE_OFTEN)
55 use_flags |= BO_USE_SW_WRITE_OFTEN;
56 if (usage & GRALLOC_USAGE_HW_TEXTURE)
57 use_flags |= BO_USE_TEXTURE;
58 if (usage & GRALLOC_USAGE_HW_RENDER)
59 use_flags |= BO_USE_RENDERING;
60 if (usage & GRALLOC_USAGE_HW_2D)
61 use_flags |= BO_USE_RENDERING;
62 if (usage & GRALLOC_USAGE_HW_COMPOSER)
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070063 /* HWC wants to use display hardware, but can defer to OpenGL. */
Gurchetan Singha1892b22017-09-28 16:40:52 -070064 use_flags |= BO_USE_SCANOUT | BO_USE_TEXTURE;
65 if (usage & GRALLOC_USAGE_HW_FB)
66 use_flags |= BO_USE_NONE;
67 if (usage & GRALLOC_USAGE_EXTERNAL_DISP)
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070068 /*
69 * This flag potentially covers external display for the normal drivers (i915,
70 * rockchip) and usb monitors (evdi/udl). It's complicated so ignore it.
71 * */
Gurchetan Singha1892b22017-09-28 16:40:52 -070072 use_flags |= BO_USE_NONE;
73 if (usage & GRALLOC_USAGE_PROTECTED)
74 use_flags |= BO_USE_PROTECTED;
Hirokazu Honda5e55f952019-11-08 12:57:55 +090075 if (usage & GRALLOC_USAGE_HW_VIDEO_ENCODER) {
76 use_flags |= BO_USE_HW_VIDEO_ENCODER;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070077 /*HACK: See b/30054495 */
Gurchetan Singha1892b22017-09-28 16:40:52 -070078 use_flags |= BO_USE_SW_READ_OFTEN;
Hirokazu Honda5e55f952019-11-08 12:57:55 +090079 }
Gurchetan Singha1892b22017-09-28 16:40:52 -070080 if (usage & GRALLOC_USAGE_HW_CAMERA_WRITE)
81 use_flags |= BO_USE_CAMERA_WRITE;
82 if (usage & GRALLOC_USAGE_HW_CAMERA_READ)
83 use_flags |= BO_USE_CAMERA_READ;
84 if (usage & GRALLOC_USAGE_RENDERSCRIPT)
85 use_flags |= BO_USE_RENDERSCRIPT;
David Stevens6116b312019-09-03 10:49:50 +090086 if (usage & BUFFER_USAGE_VIDEO_DECODER)
87 use_flags |= BO_USE_HW_VIDEO_DECODER;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070088
Gurchetan Singha1892b22017-09-28 16:40:52 -070089 return use_flags;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070090}
91
Gurchetan Singhf7f633a2017-09-28 17:02:12 -070092static uint32_t gralloc0_convert_map_usage(int map_usage)
93{
94 uint32_t map_flags = BO_MAP_NONE;
95
96 if (map_usage & GRALLOC_USAGE_SW_READ_MASK)
97 map_flags |= BO_MAP_READ;
98 if (map_usage & GRALLOC_USAGE_SW_WRITE_MASK)
99 map_flags |= BO_MAP_WRITE;
100
101 return map_flags;
102}
103
Hirokazu Honda758cf122019-12-03 11:01:59 +0900104static int gralloc0_droid_yuv_format(int droid_format)
105{
106
107 return (droid_format == HAL_PIXEL_FORMAT_YCbCr_420_888 ||
108 droid_format == HAL_PIXEL_FORMAT_YV12);
109}
110
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700111static int gralloc0_alloc(alloc_device_t *dev, int w, int h, int format, int usage,
112 buffer_handle_t *handle, int *stride)
113{
114 int32_t ret;
115 bool supported;
116 struct cros_gralloc_buffer_descriptor descriptor;
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700117 auto mod = (struct gralloc0_module const *)dev->common.module;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700118
119 descriptor.width = w;
120 descriptor.height = h;
121 descriptor.droid_format = format;
Jason Macnak1de7f662020-01-24 15:05:57 -0800122 descriptor.droid_usage = usage;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700123 descriptor.drm_format = cros_gralloc_convert_format(format);
Gurchetan Singha1892b22017-09-28 16:40:52 -0700124 descriptor.use_flags = gralloc0_convert_usage(usage);
Jason Macnak1de7f662020-01-24 15:05:57 -0800125 descriptor.reserved_region_size = 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700126
127 supported = mod->driver->is_supported(&descriptor);
128 if (!supported && (usage & GRALLOC_USAGE_HW_COMPOSER)) {
Gurchetan Singha1892b22017-09-28 16:40:52 -0700129 descriptor.use_flags &= ~BO_USE_SCANOUT;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700130 supported = mod->driver->is_supported(&descriptor);
131 }
Hirokazu Honda758cf122019-12-03 11:01:59 +0900132 if (!supported && (usage & GRALLOC_USAGE_HW_VIDEO_ENCODER) &&
133 !gralloc0_droid_yuv_format(format)) {
134 // Unmask BO_USE_HW_VIDEO_ENCODER in the case of non-yuv formats
135 // because they are not input to a hw encoder but used as an
136 // intermediate format (e.g. camera).
137 descriptor.use_flags &= ~BO_USE_HW_VIDEO_ENCODER;
138 supported = mod->driver->is_supported(&descriptor);
139 }
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700140
141 if (!supported) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700142 drv_log("Unsupported combination -- HAL format: %u, HAL usage: %u, "
143 "drv_format: %4.4s, use_flags: %llu\n",
144 format, usage, reinterpret_cast<char *>(&descriptor.drm_format),
145 static_cast<unsigned long long>(descriptor.use_flags));
Tomasz Figa90bb7432017-07-21 17:54:05 +0900146 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700147 }
148
149 ret = mod->driver->allocate(&descriptor, handle);
150 if (ret)
151 return ret;
152
153 auto hnd = cros_gralloc_convert_handle(*handle);
154 *stride = hnd->pixel_stride;
155
Tomasz Figa90bb7432017-07-21 17:54:05 +0900156 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700157}
158
159static int gralloc0_free(alloc_device_t *dev, buffer_handle_t handle)
160{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700161 auto mod = (struct gralloc0_module const *)dev->common.module;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700162 return mod->driver->release(handle);
163}
164
165static int gralloc0_close(struct hw_device_t *dev)
166{
167 /* Memory is freed by managed pointers on process close. */
Tomasz Figa90bb7432017-07-21 17:54:05 +0900168 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700169}
170
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700171static int gralloc0_init(struct gralloc0_module *mod, bool initialize_alloc)
172{
173 std::lock_guard<std::mutex> lock(mod->initialization_mutex);
174
175 if (mod->initialized)
176 return 0;
177
178 mod->driver = std::make_unique<cros_gralloc_driver>();
179 if (mod->driver->init()) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700180 drv_log("Failed to initialize driver.\n");
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700181 return -ENODEV;
182 }
183
184 if (initialize_alloc) {
185 mod->alloc = std::make_unique<alloc_device_t>();
186 mod->alloc->alloc = gralloc0_alloc;
187 mod->alloc->free = gralloc0_free;
188 mod->alloc->common.tag = HARDWARE_DEVICE_TAG;
189 mod->alloc->common.version = 0;
190 mod->alloc->common.module = (hw_module_t *)mod;
191 mod->alloc->common.close = gralloc0_close;
192 }
193
194 mod->initialized = true;
195 return 0;
196}
197
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700198static int gralloc0_open(const struct hw_module_t *mod, const char *name, struct hw_device_t **dev)
199{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700200 auto const_module = reinterpret_cast<const struct gralloc0_module *>(mod);
201 auto module = const_cast<struct gralloc0_module *>(const_module);
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700202
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700203 if (module->initialized) {
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700204 *dev = &module->alloc->common;
Tomasz Figa90bb7432017-07-21 17:54:05 +0900205 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700206 }
207
208 if (strcmp(name, GRALLOC_HARDWARE_GPU0)) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700209 drv_log("Incorrect device name - %s.\n", name);
Tomasz Figa90bb7432017-07-21 17:54:05 +0900210 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700211 }
212
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700213 if (gralloc0_init(module, true))
214 return -ENODEV;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700215
216 *dev = &module->alloc->common;
Tomasz Figa90bb7432017-07-21 17:54:05 +0900217 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700218}
219
220static int gralloc0_register_buffer(struct gralloc_module_t const *module, buffer_handle_t handle)
221{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700222 auto const_module = reinterpret_cast<const struct gralloc0_module *>(module);
223 auto mod = const_cast<struct gralloc0_module *>(const_module);
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700224
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700225 if (!mod->initialized)
226 if (gralloc0_init(mod, false))
227 return -ENODEV;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700228
229 return mod->driver->retain(handle);
230}
231
232static int gralloc0_unregister_buffer(struct gralloc_module_t const *module, buffer_handle_t handle)
233{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700234 auto mod = (struct gralloc0_module const *)module;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700235 return mod->driver->release(handle);
236}
237
238static int gralloc0_lock(struct gralloc_module_t const *module, buffer_handle_t handle, int usage,
239 int l, int t, int w, int h, void **vaddr)
240{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700241 return module->lockAsync(module, handle, usage, l, t, w, h, vaddr, -1);
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700242}
243
244static int gralloc0_unlock(struct gralloc_module_t const *module, buffer_handle_t handle)
245{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700246 int32_t fence_fd, ret;
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700247 auto mod = (struct gralloc0_module const *)module;
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700248 ret = mod->driver->unlock(handle, &fence_fd);
249 if (ret)
250 return ret;
251
Jason Macnak1de7f662020-01-24 15:05:57 -0800252 ret = cros_gralloc_sync_wait(fence_fd, /*close_acquire_fence=*/true);
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700253 if (ret)
254 return ret;
255
256 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700257}
258
259static int gralloc0_perform(struct gralloc_module_t const *module, int op, ...)
260{
261 va_list args;
262 int32_t *out_format, ret;
263 uint64_t *out_store;
264 buffer_handle_t handle;
265 uint32_t *out_width, *out_height, *out_stride;
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700266 uint32_t strides[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
267 uint32_t offsets[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700268 auto mod = (struct gralloc0_module const *)module;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700269
270 switch (op) {
271 case GRALLOC_DRM_GET_STRIDE:
272 case GRALLOC_DRM_GET_FORMAT:
273 case GRALLOC_DRM_GET_DIMENSIONS:
274 case GRALLOC_DRM_GET_BACKING_STORE:
275 break;
276 default:
Tomasz Figa90bb7432017-07-21 17:54:05 +0900277 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700278 }
279
280 va_start(args, op);
281
Tomasz Figa90bb7432017-07-21 17:54:05 +0900282 ret = 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700283 handle = va_arg(args, buffer_handle_t);
284 auto hnd = cros_gralloc_convert_handle(handle);
285 if (!hnd) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700286 drv_log("Invalid handle.\n");
Tomasz Figa90bb7432017-07-21 17:54:05 +0900287 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700288 }
289
290 switch (op) {
291 case GRALLOC_DRM_GET_STRIDE:
292 out_stride = va_arg(args, uint32_t *);
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700293 ret = mod->driver->resource_info(handle, strides, offsets);
294 if (ret)
295 break;
296
297 if (strides[0] != hnd->strides[0]) {
298 uint32_t bytes_per_pixel = drv_bytes_per_pixel_from_format(hnd->format, 0);
299 *out_stride = DIV_ROUND_UP(strides[0], bytes_per_pixel);
300 } else {
301 *out_stride = hnd->pixel_stride;
302 }
303
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700304 break;
305 case GRALLOC_DRM_GET_FORMAT:
306 out_format = va_arg(args, int32_t *);
307 *out_format = hnd->droid_format;
308 break;
309 case GRALLOC_DRM_GET_DIMENSIONS:
310 out_width = va_arg(args, uint32_t *);
311 out_height = va_arg(args, uint32_t *);
312 *out_width = hnd->width;
313 *out_height = hnd->height;
314 break;
315 case GRALLOC_DRM_GET_BACKING_STORE:
316 out_store = va_arg(args, uint64_t *);
317 ret = mod->driver->get_backing_store(handle, out_store);
318 break;
319 default:
Tomasz Figa90bb7432017-07-21 17:54:05 +0900320 ret = -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700321 }
322
323 va_end(args);
324
325 return ret;
326}
327
328static int gralloc0_lock_ycbcr(struct gralloc_module_t const *module, buffer_handle_t handle,
329 int usage, int l, int t, int w, int h, struct android_ycbcr *ycbcr)
330{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700331 return module->lockAsync_ycbcr(module, handle, usage, l, t, w, h, ycbcr, -1);
332}
333
334static int gralloc0_lock_async(struct gralloc_module_t const *module, buffer_handle_t handle,
335 int usage, int l, int t, int w, int h, void **vaddr, int fence_fd)
336{
337 int32_t ret;
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700338 uint32_t map_flags;
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700339 uint8_t *addr[DRV_MAX_PLANES];
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700340 auto mod = (struct gralloc0_module const *)module;
Gurchetan Singh2b1d6892018-09-17 16:58:16 -0700341 struct rectangle rect = { .x = static_cast<uint32_t>(l),
342 .y = static_cast<uint32_t>(t),
343 .width = static_cast<uint32_t>(w),
344 .height = static_cast<uint32_t>(h) };
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700345
346 auto hnd = cros_gralloc_convert_handle(handle);
347 if (!hnd) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700348 drv_log("Invalid handle.\n");
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700349 return -EINVAL;
350 }
351
352 if (hnd->droid_format == HAL_PIXEL_FORMAT_YCbCr_420_888) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700353 drv_log("HAL_PIXEL_FORMAT_YCbCr_*_888 format not compatible.\n");
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700354 return -EINVAL;
355 }
356
Gurchetan Singh1ef809e2017-11-06 11:07:52 -0800357 assert(l >= 0);
358 assert(t >= 0);
359 assert(w >= 0);
360 assert(h >= 0);
361
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700362 map_flags = gralloc0_convert_map_usage(usage);
Jason Macnak1de7f662020-01-24 15:05:57 -0800363 ret = mod->driver->lock(handle, fence_fd, true, &rect, map_flags, addr);
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700364 *vaddr = addr[0];
365 return ret;
366}
367
368static int gralloc0_unlock_async(struct gralloc_module_t const *module, buffer_handle_t handle,
369 int *fence_fd)
370{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700371 auto mod = (struct gralloc0_module const *)module;
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700372 return mod->driver->unlock(handle, fence_fd);
373}
374
375static int gralloc0_lock_async_ycbcr(struct gralloc_module_t const *module, buffer_handle_t handle,
376 int usage, int l, int t, int w, int h,
377 struct android_ycbcr *ycbcr, int fence_fd)
378{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700379 int32_t ret;
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700380 uint32_t map_flags;
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700381 uint32_t strides[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
382 uint32_t offsets[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700383 uint8_t *addr[DRV_MAX_PLANES] = { nullptr, nullptr, nullptr, nullptr };
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700384 auto mod = (struct gralloc0_module const *)module;
Gurchetan Singh2b1d6892018-09-17 16:58:16 -0700385 struct rectangle rect = { .x = static_cast<uint32_t>(l),
386 .y = static_cast<uint32_t>(t),
387 .width = static_cast<uint32_t>(w),
388 .height = static_cast<uint32_t>(h) };
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700389
390 auto hnd = cros_gralloc_convert_handle(handle);
391 if (!hnd) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700392 drv_log("Invalid handle.\n");
Tomasz Figa90bb7432017-07-21 17:54:05 +0900393 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700394 }
395
Hirokazu Honda758cf122019-12-03 11:01:59 +0900396 if (!gralloc0_droid_yuv_format(hnd->droid_format) &&
397 hnd->droid_format != HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700398 drv_log("Non-YUV format not compatible.\n");
Tomasz Figa90bb7432017-07-21 17:54:05 +0900399 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700400 }
401
Gurchetan Singh1ef809e2017-11-06 11:07:52 -0800402 assert(l >= 0);
403 assert(t >= 0);
404 assert(w >= 0);
405 assert(h >= 0);
406
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700407 map_flags = gralloc0_convert_map_usage(usage);
Jason Macnak1de7f662020-01-24 15:05:57 -0800408 ret = mod->driver->lock(handle, fence_fd, true, &rect, map_flags, addr);
Tomasz Figaaddd5f22017-07-05 17:50:18 +0900409 if (ret)
410 return ret;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700411
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700412 if (!map_flags) {
413 ret = mod->driver->resource_info(handle, strides, offsets);
414 if (ret)
415 return ret;
416
417 for (uint32_t plane = 0; plane < DRV_MAX_PLANES; plane++)
Jason Macnaka03926e2020-05-14 10:57:17 -0700418 addr[plane] =
419 reinterpret_cast<uint8_t *>(static_cast<uintptr_t>(offsets[plane]));
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700420 }
421
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700422 switch (hnd->format) {
423 case DRM_FORMAT_NV12:
424 ycbcr->y = addr[0];
425 ycbcr->cb = addr[1];
426 ycbcr->cr = addr[1] + 1;
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700427 ycbcr->ystride = (!map_flags) ? strides[0] : hnd->strides[0];
428 ycbcr->cstride = (!map_flags) ? strides[1] : hnd->strides[1];
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700429 ycbcr->chroma_step = 2;
430 break;
431 case DRM_FORMAT_YVU420:
432 case DRM_FORMAT_YVU420_ANDROID:
433 ycbcr->y = addr[0];
434 ycbcr->cb = addr[2];
435 ycbcr->cr = addr[1];
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700436 ycbcr->ystride = (!map_flags) ? strides[0] : hnd->strides[0];
437 ycbcr->cstride = (!map_flags) ? strides[1] : hnd->strides[1];
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700438 ycbcr->chroma_step = 1;
439 break;
440 default:
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700441 module->unlock(module, handle);
Tomasz Figa90bb7432017-07-21 17:54:05 +0900442 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700443 }
444
Tomasz Figa90bb7432017-07-21 17:54:05 +0900445 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700446}
447
Tomasz Figa4df286c2017-08-02 19:35:40 +0900448// clang-format off
449static struct hw_module_methods_t gralloc0_module_methods = { .open = gralloc0_open };
450// clang-format on
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700451
452struct gralloc0_module HAL_MODULE_INFO_SYM = {
453 .base =
454 {
455 .common =
456 {
457 .tag = HARDWARE_MODULE_TAG,
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700458 .module_api_version = GRALLOC_MODULE_API_VERSION_0_3,
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700459 .hal_api_version = 0,
460 .id = GRALLOC_HARDWARE_MODULE_ID,
461 .name = "CrOS Gralloc",
462 .author = "Chrome OS",
463 .methods = &gralloc0_module_methods,
464 },
465
466 .registerBuffer = gralloc0_register_buffer,
467 .unregisterBuffer = gralloc0_unregister_buffer,
468 .lock = gralloc0_lock,
469 .unlock = gralloc0_unlock,
470 .perform = gralloc0_perform,
471 .lock_ycbcr = gralloc0_lock_ycbcr,
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700472 .lockAsync = gralloc0_lock_async,
473 .unlockAsync = gralloc0_unlock_async,
474 .lockAsync_ycbcr = gralloc0_lock_async_ycbcr,
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700475 },
476
477 .alloc = nullptr,
478 .driver = nullptr,
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700479 .initialized = false,
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700480};