blob: efdeda6b789bb01d5c5094926556299053efbf34 [file] [log] [blame]
Stéphane Marchesin25a26062014-09-12 16:18:59 -07001/*
Daniele Castagna7a755de2016-12-16 17:32:30 -05002 * Copyright 2014 The Chromium OS Authors. All rights reserved.
Stéphane Marchesin25a26062014-09-12 16:18:59 -07003 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Gurchetan Singh46faf6b2016-08-05 14:40:07 -07007#ifdef DRV_I915
Stéphane Marchesin25a26062014-09-12 16:18:59 -07008
9#include <errno.h>
Gurchetan Singh82a8eed2017-01-03 13:01:37 -080010#include <i915_drm.h>
Gurchetan Singhcc015e82017-01-17 16:15:25 -080011#include <stdio.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070012#include <string.h>
Gurchetan Singhef920532016-08-12 16:38:25 -070013#include <sys/mman.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070014#include <xf86drm.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070015
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070016#include "drv_priv.h"
Stéphane Marchesin25a26062014-09-12 16:18:59 -070017#include "helpers.h"
18#include "util.h"
19
Gurchetan Singh68af9c22017-01-18 13:48:11 -080020#define I915_CACHELINE_SIZE 64
21#define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1)
22
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080023static const uint32_t tileable_formats[] = { DRM_FORMAT_ARGB1555, DRM_FORMAT_ABGR8888,
24 DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565,
25 DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555,
26 DRM_FORMAT_XRGB8888, DRM_FORMAT_UYVY,
27 DRM_FORMAT_YUYV };
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080028
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080029static const uint32_t linear_only_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_R8, DRM_FORMAT_YVU420,
30 DRM_FORMAT_YVU420_ANDROID };
Gurchetan Singh179687e2016-10-28 10:07:35 -070031
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080032struct i915_device {
Gurchetan Singh68af9c22017-01-18 13:48:11 -080033 uint32_t gen;
34 int32_t has_llc;
Stéphane Marchesin25a26062014-09-12 16:18:59 -070035};
36
Gurchetan Singh68af9c22017-01-18 13:48:11 -080037static uint32_t i915_get_gen(int device_id)
Stéphane Marchesin25a26062014-09-12 16:18:59 -070038{
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080039 const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
40 0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 };
Stéphane Marchesina39dfde2014-09-15 15:38:25 -070041 unsigned i;
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080042 for (i = 0; i < ARRAY_SIZE(gen3_ids); i++)
Stéphane Marchesin25a26062014-09-12 16:18:59 -070043 if (gen3_ids[i] == device_id)
44 return 3;
45
46 return 4;
47}
48
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080049static int i915_add_kms_item(struct driver *drv, const struct kms_item *item)
50{
51 uint32_t i;
52 struct combination *combo;
53
54 /*
55 * Older hardware can't scanout Y-tiled formats. Newer devices can, and
56 * report this functionality via format modifiers.
57 */
58 for (i = 0; i < drv->backend->combos.size; i++) {
59 combo = &drv->backend->combos.data[i];
60 if (combo->format == item->format) {
61 if ((combo->metadata.tiling == I915_TILING_Y &&
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080062 item->modifier == I915_FORMAT_MOD_Y_TILED) ||
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080063 (combo->metadata.tiling == I915_TILING_X &&
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080064 item->modifier == I915_FORMAT_MOD_X_TILED)) {
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080065 combo->metadata.modifier = item->modifier;
66 combo->usage |= item->usage;
67 } else if (combo->metadata.tiling != I915_TILING_Y) {
68 combo->usage |= item->usage;
69 }
70 }
71 }
72
73 return 0;
74}
75
76static int i915_add_combinations(struct driver *drv)
77{
78 int ret;
79 uint32_t i, num_items;
80 struct kms_item *items;
81 struct format_metadata metadata;
82 uint64_t flags = BO_COMMON_USE_MASK;
83
84 metadata.tiling = I915_TILING_NONE;
85 metadata.priority = 1;
86 metadata.modifier = DRM_FORMAT_MOD_NONE;
87
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080088 ret = drv_add_combinations(drv, linear_only_formats, ARRAY_SIZE(linear_only_formats),
89 &metadata, flags);
90 if (ret)
91 return ret;
92
93 ret = drv_add_combinations(drv, tileable_formats, ARRAY_SIZE(tileable_formats), &metadata,
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080094 flags);
95 if (ret)
96 return ret;
97
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080098 drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
99 drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800100
101 flags &= ~BO_USE_SW_WRITE_OFTEN;
102 flags &= ~BO_USE_SW_READ_OFTEN;
103 flags &= ~BO_USE_LINEAR;
104
105 metadata.tiling = I915_TILING_X;
106 metadata.priority = 2;
107
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800108 ret = drv_add_combinations(drv, tileable_formats, ARRAY_SIZE(tileable_formats), &metadata,
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800109 flags);
110 if (ret)
111 return ret;
112
113 metadata.tiling = I915_TILING_Y;
114 metadata.priority = 3;
115
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800116 ret = drv_add_combinations(drv, tileable_formats, ARRAY_SIZE(tileable_formats), &metadata,
117 flags);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800118 if (ret)
119 return ret;
120
121 items = drv_query_kms(drv, &num_items);
122 if (!items || !num_items)
123 return 0;
124
125 for (i = 0; i < num_items; i++) {
126 ret = i915_add_kms_item(drv, &items[i]);
127 if (ret) {
128 free(items);
129 return ret;
130 }
131 }
132
133 free(items);
134 return 0;
135}
136
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800137static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *stride,
138 uint32_t *aligned_height)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700139{
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700140 struct i915_device *i915 = bo->drv->priv;
141 uint32_t horizontal_alignment = 4;
142 uint32_t vertical_alignment = 4;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700143
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700144 switch (tiling) {
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700145 default:
146 case I915_TILING_NONE:
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700147 horizontal_alignment = 64;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700148 break;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800149
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700150 case I915_TILING_X:
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700151 horizontal_alignment = 512;
152 vertical_alignment = 8;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700153 break;
154
155 case I915_TILING_Y:
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700156 if (i915->gen == 3) {
157 horizontal_alignment = 512;
158 vertical_alignment = 8;
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800159 } else {
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700160 horizontal_alignment = 128;
161 vertical_alignment = 32;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700162 }
163 break;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700164 }
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800165
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700166 *aligned_height = ALIGN(bo->height, vertical_alignment);
167 if (i915->gen > 3) {
168 *stride = ALIGN(*stride, horizontal_alignment);
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800169 } else {
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700170 while (*stride > horizontal_alignment)
171 horizontal_alignment <<= 1;
172
173 *stride = horizontal_alignment;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800174 }
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800175
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700176 if (i915->gen <= 3 && *stride > 8192)
177 return -EINVAL;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800178
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700179 return 0;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700180}
181
Gurchetan Singh68af9c22017-01-18 13:48:11 -0800182static void i915_clflush(void *start, size_t size)
183{
184 void *p = (void *)(((uintptr_t)start) & ~I915_CACHELINE_MASK);
185 void *end = (void *)((uintptr_t)start + size);
186
187 __builtin_ia32_mfence();
188 while (p < end) {
189 __builtin_ia32_clflush(p);
190 p = (void *)((uintptr_t)p + I915_CACHELINE_SIZE);
191 }
192}
193
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800194static int i915_init(struct driver *drv)
195{
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800196 int ret;
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800197 int device_id;
198 struct i915_device *i915;
199 drm_i915_getparam_t get_param;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800200
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800201 i915 = calloc(1, sizeof(*i915));
202 if (!i915)
203 return -ENOMEM;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800204
205 memset(&get_param, 0, sizeof(get_param));
206 get_param.param = I915_PARAM_CHIPSET_ID;
207 get_param.value = &device_id;
208 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
209 if (ret) {
Gurchetan Singh68af9c22017-01-18 13:48:11 -0800210 fprintf(stderr, "drv: Failed to get I915_PARAM_CHIPSET_ID\n");
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800211 free(i915);
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800212 return -EINVAL;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800213 }
214
Gurchetan Singh68af9c22017-01-18 13:48:11 -0800215 i915->gen = i915_get_gen(device_id);
216
217 memset(&get_param, 0, sizeof(get_param));
218 get_param.param = I915_PARAM_HAS_LLC;
219 get_param.value = &i915->has_llc;
220 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
221 if (ret) {
222 fprintf(stderr, "drv: Failed to get I915_PARAM_HAS_LLC\n");
223 free(i915);
224 return -EINVAL;
225 }
226
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800227 drv->priv = i915;
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800228
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800229 return i915_add_combinations(drv);
Gurchetan Singh3eb8d8f2017-01-03 13:36:13 -0800230}
231
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800232static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
233 uint32_t flags)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700234{
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700235 int ret;
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800236 size_t plane;
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700237 uint32_t stride;
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800238 struct drm_i915_gem_create gem_create;
239 struct drm_i915_gem_set_tiling gem_set_tiling;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700240
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800241 if (flags & (BO_USE_CURSOR | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN))
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800242 bo->tiling = I915_TILING_NONE;
Gurchetan Singh458976f2016-11-23 17:32:33 -0800243 else if (flags & BO_USE_SCANOUT)
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800244 bo->tiling = I915_TILING_X;
Gurchetan Singh6bab0c12016-10-13 19:08:48 -0700245 else
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800246 bo->tiling = I915_TILING_Y;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700247
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800248 stride = drv_stride_from_format(format, width, 0);
Gurchetan Singh507f5dd2017-03-16 13:14:30 -0700249 /*
250 * Align the Y plane to 128 bytes so the chroma planes would be aligned
251 * to 64 byte boundaries. This is an Intel HW requirement.
252 */
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800253 if (format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID) {
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700254 stride = ALIGN(stride, 128);
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800255 bo->tiling = I915_TILING_NONE;
Gurchetan Singh507f5dd2017-03-16 13:14:30 -0700256 }
257
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800258 ret = i915_align_dimensions(bo, bo->tiling, &stride, &height);
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700259 if (ret)
260 return ret;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800261
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700262 drv_bo_from_format(bo, stride, height, format);
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800263
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800264 memset(&gem_create, 0, sizeof(gem_create));
265 gem_create.size = bo->total_size;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800266
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800267 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
268 if (ret) {
269 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n",
270 gem_create.size);
271 return ret;
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700272 }
Gurchetan Singh83dc4fb2016-07-19 15:52:33 -0700273
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800274 for (plane = 0; plane < bo->num_planes; plane++)
275 bo->handles[plane].u32 = gem_create.handle;
Daniel Nicoara1de26dc2014-09-25 18:53:19 -0400276
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800277 memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
278 gem_set_tiling.handle = bo->handles[0].u32;
279 gem_set_tiling.tiling_mode = bo->tiling;
280 gem_set_tiling.stride = bo->strides[0];
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700281
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800282 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
283 if (ret) {
284 struct drm_gem_close gem_close;
285 memset(&gem_close, 0, sizeof(gem_close));
286 gem_close.handle = bo->handles[0].u32;
287 drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800288
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800289 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_TILING failed with %d", errno);
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700290 return -errno;
291 }
292
293 return 0;
294}
295
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800296static void i915_close(struct driver *drv)
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800297{
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800298 free(drv->priv);
299 drv->priv = NULL;
Gurchetan Singh82a8eed2017-01-03 13:01:37 -0800300}
301
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800302static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
303{
304 int ret;
305 struct drm_i915_gem_get_tiling gem_get_tiling;
306
307 ret = drv_prime_bo_import(bo, data);
308 if (ret)
309 return ret;
310
311 /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
312 memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
313 gem_get_tiling.handle = bo->handles[0].u32;
314
315 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
316 if (ret) {
317 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_GET_TILING failed.");
318 return ret;
319 }
320
321 bo->tiling = gem_get_tiling.tiling_mode;
322 return 0;
323}
324
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700325static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane)
Gurchetan Singhef920532016-08-12 16:38:25 -0700326{
327 int ret;
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800328 void *addr;
329 struct drm_i915_gem_set_domain set_domain;
Gurchetan Singhef920532016-08-12 16:38:25 -0700330
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800331 memset(&set_domain, 0, sizeof(set_domain));
332 set_domain.handle = bo->handles[0].u32;
333 if (bo->tiling == I915_TILING_NONE) {
334 struct drm_i915_gem_mmap gem_map;
335 memset(&gem_map, 0, sizeof(gem_map));
Gurchetan Singhef920532016-08-12 16:38:25 -0700336
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800337 gem_map.handle = bo->handles[0].u32;
338 gem_map.offset = 0;
339 gem_map.size = bo->total_size;
340
341 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_map);
342 if (ret) {
343 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP failed\n");
344 return MAP_FAILED;
345 }
346
347 addr = (void *)(uintptr_t)gem_map.addr_ptr;
348 set_domain.read_domains = I915_GEM_DOMAIN_CPU;
349 set_domain.write_domain = I915_GEM_DOMAIN_CPU;
350
351 } else {
352 struct drm_i915_gem_mmap_gtt gem_map;
353 memset(&gem_map, 0, sizeof(gem_map));
354
355 gem_map.handle = bo->handles[0].u32;
356
357 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
358 if (ret) {
359 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
360 return MAP_FAILED;
361 }
362
363 addr = mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED, bo->drv->fd,
364 gem_map.offset);
365
366 set_domain.read_domains = I915_GEM_DOMAIN_GTT;
367 set_domain.write_domain = I915_GEM_DOMAIN_GTT;
368 }
369
370 if (addr == MAP_FAILED) {
371 fprintf(stderr, "drv: i915 GEM mmap failed\n");
372 return addr;
373 }
374
375 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain);
Gurchetan Singhef920532016-08-12 16:38:25 -0700376 if (ret) {
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800377 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_DOMAIN failed\n");
Gurchetan Singhef920532016-08-12 16:38:25 -0700378 return MAP_FAILED;
379 }
380
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800381 data->length = bo->total_size;
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800382 return addr;
383}
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700384
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800385static int i915_bo_unmap(struct bo *bo, struct map_info *data)
386{
Gurchetan Singh68af9c22017-01-18 13:48:11 -0800387 struct i915_device *i915 = bo->drv->priv;
388 if (!i915->has_llc && bo->tiling == I915_TILING_NONE)
389 i915_clflush(data->addr, data->length);
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800390
391 return munmap(data->addr, data->length);
Gurchetan Singhef920532016-08-12 16:38:25 -0700392}
393
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800394static uint32_t i915_resolve_format(uint32_t format)
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700395{
396 switch (format) {
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800397 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700398 /*HACK: See b/28671744 */
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800399 return DRM_FORMAT_XBGR8888;
400 case DRM_FORMAT_FLEX_YCbCr_420_888:
Gurchetan Singh03f13562017-02-08 15:21:14 -0800401 return DRM_FORMAT_YVU420_ANDROID;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700402 default:
403 return format;
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700404 }
405}
406
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800407struct backend backend_i915 = {
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700408 .name = "i915",
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700409 .init = i915_init,
410 .close = i915_close,
411 .bo_create = i915_bo_create,
Gurchetan Singhcc015e82017-01-17 16:15:25 -0800412 .bo_destroy = drv_gem_bo_destroy,
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800413 .bo_import = i915_bo_import,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700414 .bo_map = i915_bo_map,
Gurchetan Singhfcad5ad2017-01-05 20:39:31 -0800415 .bo_unmap = i915_bo_unmap,
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700416 .resolve_format = i915_resolve_format,
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700417};
418
419#endif