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Johan RUDHOLMa8bfde72012-02-12 11:46:44 -05001/*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public
4 * License v2 as published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
9 * General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public
12 * License along with this program; if not, write to the
13 * Free Software Foundation, Inc., 59 Temple Place - Suite 330,
14 * Boston, MA 021110-1307, USA.
15 */
16
17#include <asm-generic/int-ll64.h>
18#include <linux/mmc/ioctl.h>
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050019#include <stdio.h>
20
21#define CHECK(expr, msg, err_stmt) { if (expr) { fprintf(stderr, msg); err_stmt; } }
22
Roman Peniaevc6cb0532014-08-12 23:25:45 +090023#ifndef offsetof
24#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
25#endif
26
Oleg Matcovschi294bf862013-05-23 17:11:06 -070027/* From kernel linux/major.h */
28#define MMC_BLOCK_MAJOR 179
29
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050030/* From kernel linux/mmc/mmc.h */
31#define MMC_SWITCH 6 /* ac [31:0] See below R1b */
32#define MMC_SEND_EXT_CSD 8 /* adtc R1 */
Ben Gardiner27c357d2013-05-30 17:12:47 -040033#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */
34#define R1_SWITCH_ERROR (1 << 7) /* sx, c */
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050035#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */
Roman Peniaevc6cb0532014-08-12 23:25:45 +090036#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
37#define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050038
39/*
40 * EXT_CSD fields
41 */
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +010042#define EXT_CSD_S_CMD_SET 504
43#define EXT_CSD_HPI_FEATURE 503
Jaehoon Chung86496512012-09-21 10:08:05 +000044#define EXT_CSD_BKOPS_SUPPORT 502 /* RO */
Al Cooperd0b46442015-04-29 18:12:35 -040045#define EXT_CSD_CACHE_SIZE_3 252
46#define EXT_CSD_CACHE_SIZE_2 251
47#define EXT_CSD_CACHE_SIZE_1 250
48#define EXT_CSD_CACHE_SIZE_0 249
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +010049#define EXT_CSD_BOOT_INFO 228 /* R/W */
Ben Gardiner4e850232013-05-30 17:12:49 -040050#define EXT_CSD_SEC_COUNT_3 215
51#define EXT_CSD_SEC_COUNT_2 214
52#define EXT_CSD_SEC_COUNT_1 213
53#define EXT_CSD_SEC_COUNT_0 212
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +010054#define EXT_CSD_PART_SWITCH_TIME 199
Al Cooperd0b46442015-04-29 18:12:35 -040055#define EXT_CSD_REV 192
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +010056#define EXT_CSD_BOOT_CFG 179
Giuseppe CAVALLARO7bd13202012-04-19 10:58:37 +020057#define EXT_CSD_PART_CONFIG 179
Al Cooper64c2de82015-05-01 08:24:37 -040058#define EXT_CSD_BOOT_BUS_CONDITIONS 177
Ben Gardinerd91d3692013-05-30 17:12:51 -040059#define EXT_CSD_ERASE_GROUP_DEF 175
Saugata Dasb7e25992012-05-17 09:26:34 -040060#define EXT_CSD_BOOT_WP 173
Al Cooper64c2de82015-05-01 08:24:37 -040061#define EXT_CSD_WR_REL_SET 167
Saugata Dasb7e25992012-05-17 09:26:34 -040062#define EXT_CSD_WR_REL_PARAM 166
Yaniv Gardi21bb4732013-05-26 13:25:33 -040063#define EXT_CSD_SANITIZE_START 165
Jaehoon Chung86496512012-09-21 10:08:05 +000064#define EXT_CSD_BKOPS_EN 163 /* R/W */
Chris Ballf74dfe22012-10-19 16:49:55 -040065#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
Ben Gardiner82bd9502013-06-27 11:04:10 -040066#define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
Oliver Metz22f26412013-09-23 08:40:51 +020067#define EXT_CSD_MAX_ENH_SIZE_MULT_2 159
68#define EXT_CSD_MAX_ENH_SIZE_MULT_1 158
69#define EXT_CSD_MAX_ENH_SIZE_MULT_0 157
Ben Gardinerd91d3692013-05-30 17:12:51 -040070#define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */
Ben Gardinera6cd98d2013-05-30 17:12:46 -040071#define EXT_CSD_PARTITION_SETTING_COMPLETED 155 /* R/W */
Balaji T K4afc8c82015-04-29 18:12:32 -040072#define EXT_CSD_GP_SIZE_MULT_4_2 154
73#define EXT_CSD_GP_SIZE_MULT_4_1 153
74#define EXT_CSD_GP_SIZE_MULT_4_0 152
75#define EXT_CSD_GP_SIZE_MULT_3_2 151
76#define EXT_CSD_GP_SIZE_MULT_3_1 150
77#define EXT_CSD_GP_SIZE_MULT_3_0 149
78#define EXT_CSD_GP_SIZE_MULT_2_2 148
79#define EXT_CSD_GP_SIZE_MULT_2_1 147
80#define EXT_CSD_GP_SIZE_MULT_2_0 146
81#define EXT_CSD_GP_SIZE_MULT_1_2 145
82#define EXT_CSD_GP_SIZE_MULT_1_1 144
83#define EXT_CSD_GP_SIZE_MULT_1_0 143
Ben Gardinerf82e27a2013-05-30 17:12:50 -040084#define EXT_CSD_ENH_SIZE_MULT_2 142
85#define EXT_CSD_ENH_SIZE_MULT_1 141
86#define EXT_CSD_ENH_SIZE_MULT_0 140
Ben Gardiner68f490b2013-05-30 17:12:48 -040087#define EXT_CSD_ENH_START_ADDR_3 139
88#define EXT_CSD_ENH_START_ADDR_2 138
89#define EXT_CSD_ENH_START_ADDR_1 137
90#define EXT_CSD_ENH_START_ADDR_0 136
Saugata Dasb7e25992012-05-17 09:26:34 -040091#define EXT_CSD_NATIVE_SECTOR_SIZE 63 /* R */
92#define EXT_CSD_USE_NATIVE_SECTOR 62 /* R/W */
93#define EXT_CSD_DATA_SECTOR_SIZE 61 /* R */
Balaji T K78912362015-04-29 18:12:33 -040094#define EXT_CSD_EXT_PARTITIONS_ATTRIBUTE_1 53
95#define EXT_CSD_EXT_PARTITIONS_ATTRIBUTE_0 52
Al Cooperd0b46442015-04-29 18:12:35 -040096#define EXT_CSD_CACHE_CTRL 33
Saugata Dasb7e25992012-05-17 09:26:34 -040097
98/*
99 * WR_REL_PARAM field definitions
100 */
101#define HS_CTRL_REL (1<<0)
102#define EN_REL_WR (1<<2)
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -0500103
104/*
Jaehoon Chung86496512012-09-21 10:08:05 +0000105 * BKOPS_EN field definition
106 */
107#define BKOPS_ENABLE (1<<0)
108
109/*
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -0500110 * EXT_CSD field definitions
111 */
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +0100112#define EXT_CSD_HPI_SUPP (1<<0)
113#define EXT_CSD_HPI_IMPL (1<<1)
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -0500114#define EXT_CSD_CMD_SET_NORMAL (1<<0)
115#define EXT_CSD_BOOT_WP_B_PWR_WP_DIS (0x40)
116#define EXT_CSD_BOOT_WP_B_PERM_WP_DIS (0x10)
117#define EXT_CSD_BOOT_WP_B_PERM_WP_EN (0x04)
118#define EXT_CSD_BOOT_WP_B_PWR_WP_EN (0x01)
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +0100119#define EXT_CSD_BOOT_INFO_HS_MODE (1<<2)
120#define EXT_CSD_BOOT_INFO_DDR_DDR (1<<1)
121#define EXT_CSD_BOOT_INFO_ALT (1<<0)
122#define EXT_CSD_BOOT_CFG_ACK (1<<6)
123#define EXT_CSD_BOOT_CFG_EN (0x38)
Mario Schuknecht8c0c40d2013-05-15 08:28:04 +0200124#define EXT_CSD_BOOT_CFG_ACC (0x07)
Chris Ballf74dfe22012-10-19 16:49:55 -0400125#define EXT_CSD_RST_N_EN_MASK (0x03)
126#define EXT_CSD_HW_RESET_EN (0x01)
127#define EXT_CSD_HW_RESET_DIS (0x02)
Giuseppe CAVALLARO7bd13202012-04-19 10:58:37 +0200128#define EXT_CSD_PART_CONFIG_ACC_MASK (0x7)
129#define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1)
130#define EXT_CSD_PART_CONFIG_ACC_BOOT1 (0x2)
131#define EXT_CSD_PART_CONFIG_ACC_USER_AREA (0x7)
132#define EXT_CSD_PART_CONFIG_ACC_ACK (0x40)
Ben Gardiner82bd9502013-06-27 11:04:10 -0400133#define EXT_CSD_PARTITIONING_EN (1<<0)
134#define EXT_CSD_ENH_ATTRIBUTE_EN (1<<1)
Balaji T K4afc8c82015-04-29 18:12:32 -0400135#define EXT_CSD_ENH_4 (1<<4)
136#define EXT_CSD_ENH_3 (1<<3)
137#define EXT_CSD_ENH_2 (1<<2)
138#define EXT_CSD_ENH_1 (1<<1)
Ben Gardinerd91d3692013-05-30 17:12:51 -0400139#define EXT_CSD_ENH_USR (1<<0)
Al Cooperd0b46442015-04-29 18:12:35 -0400140#define EXT_CSD_REV_V5_1 8
141#define EXT_CSD_REV_V5_0 7
142#define EXT_CSD_REV_V4_5 6
143#define EXT_CSD_REV_V4_4_1 5
144#define EXT_CSD_REV_V4_3 3
145#define EXT_CSD_REV_V4_2 2
146#define EXT_CSD_REV_V4_1 1
147#define EXT_CSD_REV_V4_0 0
148
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -0500149
150/* From kernel linux/mmc/core.h */
151#define MMC_RSP_PRESENT (1 << 0)
152#define MMC_RSP_136 (1 << 1) /* 136 bit response */
153#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
154#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
155#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
156
157#define MMC_CMD_AC (0 << 5)
158#define MMC_CMD_ADTC (1 << 5)
159
160#define MMC_RSP_SPI_S1 (1 << 7) /* one status byte */
161#define MMC_RSP_SPI_BUSY (1 << 10) /* card may send busy */
162
163#define MMC_RSP_SPI_R1 (MMC_RSP_SPI_S1)
164#define MMC_RSP_SPI_R1B (MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY)
165
166#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
167#define MMC_RSP_R1B (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY)