pw_boot_cortex_m: Rename pw_boot_armv7m to pw_boot_cortex_m:armv7m
Since the implementation is closer to a generic Cortex-M implementation,
rename pw_boot_armv7m to pw_boot_cortex_m, and add a core-specific
target named "armv7m".
This matches pw_cpu_exception_cortex_m.
Toolchain definitions will need ot be changed from:
pw_boot_BACKEND = dir_pw_boot_armv7m
to
pw_boot_BACKEND = "$dir_pw_boot_cortex_m:arm7vm"
Change-Id: Id6f4bbf8e6c1ec89afa63de7c93be1f3afa59f09
Reviewed-on: https://pigweed-review.googlesource.com/c/pigweed/pigweed/+/54242
Commit-Queue: Scott James Remnant <keybuk@google.com>
Pigweed-Auto-Submit: Scott James Remnant <keybuk@google.com>
Reviewed-by: Keir Mierle <keir@google.com>
diff --git a/docs/BUILD.gn b/docs/BUILD.gn
index b39baf3..5d21a37 100644
--- a/docs/BUILD.gn
+++ b/docs/BUILD.gn
@@ -66,7 +66,7 @@
"$dir_pw_bloat:docs",
"$dir_pw_blob_store:docs",
"$dir_pw_boot:docs",
- "$dir_pw_boot_armv7m:docs",
+ "$dir_pw_boot_cortex_m:docs",
"$dir_pw_build:docs",
"$dir_pw_bytes:docs",
"$dir_pw_checksum:docs",
diff --git a/docs/os_abstraction_layers.rst b/docs/os_abstraction_layers.rst
index e39304c..94969d5 100644
--- a/docs/os_abstraction_layers.rst
+++ b/docs/os_abstraction_layers.rst
@@ -464,7 +464,7 @@
.. Note::
To get around this one should invoke these initialization functions earlier
and/or delay the static C++ constructors to meet this ordering requirement. As
- an example if you were using :ref:`module-pw_boot_armv7m`, then
+ an example if you were using :ref:`module-pw_boot_cortex_m`, then
``pw_boot_PreStaticConstructorInit()`` would be a great place to invoke kernel
initialization.
diff --git a/modules.gni b/modules.gni
index b4e395d..4a57920 100644
--- a/modules.gni
+++ b/modules.gni
@@ -27,7 +27,7 @@
dir_pw_bloat = get_path_info("pw_bloat", "abspath")
dir_pw_blob_store = get_path_info("pw_blob_store", "abspath")
dir_pw_boot = get_path_info("pw_boot", "abspath")
- dir_pw_boot_armv7m = get_path_info("pw_boot_armv7m", "abspath")
+ dir_pw_boot_cortex_m = get_path_info("pw_boot_cortex_m", "abspath")
dir_pw_build = get_path_info("pw_build", "abspath")
dir_pw_bytes = get_path_info("pw_bytes", "abspath")
dir_pw_checksum = get_path_info("pw_checksum", "abspath")
diff --git a/pw_boot_armv7m/BUILD.bazel b/pw_boot_cortex_m/BUILD.bazel
similarity index 93%
rename from pw_boot_armv7m/BUILD.bazel
rename to pw_boot_cortex_m/BUILD.bazel
index 3418d46..002da41 100644
--- a/pw_boot_armv7m/BUILD.bazel
+++ b/pw_boot_cortex_m/BUILD.bazel
@@ -21,10 +21,10 @@
licenses(["notice"])
pw_cc_library(
- name = "pw_boot_armv7m",
+ name = "armv7m",
srcs = [
"core_init.c",
- "public/pw_boot_armv7m/boot.h",
+ "public/pw_boot_cortex_m/boot.h",
],
includes = ["public"],
target_compatible_with = select({
diff --git a/pw_boot_armv7m/BUILD.gn b/pw_boot_cortex_m/BUILD.gn
similarity index 73%
rename from pw_boot_armv7m/BUILD.gn
rename to pw_boot_cortex_m/BUILD.gn
index 3029ec4..2951e8d 100644
--- a/pw_boot_armv7m/BUILD.gn
+++ b/pw_boot_cortex_m/BUILD.gn
@@ -22,27 +22,27 @@
declare_args() {
# This list should contain the necessary defines for setting pw_boot linker
# script memory regions.
- pw_boot_armv7m_LINK_CONFIG_DEFINES = []
+ pw_boot_cortex_m_LINK_CONFIG_DEFINES = []
}
-if (pw_boot_BACKEND == dir_pw_boot_armv7m) {
+if (pw_boot_BACKEND == "$dir_pw_boot_cortex_m:armv7m") {
config("default_config") {
include_dirs = [ "public" ]
}
- pw_linker_script("armv7m_linker_script") {
- # pw_boot_armv7m_LINK_CONFIG_DEFINES is a list of defines provided by the
+ pw_linker_script("cortex_m_linker_script") {
+ # pw_boot_cortex_m_LINK_CONFIG_DEFINES is a list of defines provided by the
# target.
- defines = pw_boot_armv7m_LINK_CONFIG_DEFINES
- linker_script = "basic_armv7m.ld"
+ defines = pw_boot_cortex_m_LINK_CONFIG_DEFINES
+ linker_script = "basic_cortex_m.ld"
}
- pw_source_set("pw_boot_armv7m") {
+ pw_source_set("armv7m") {
public_configs = [ ":default_config" ]
- public = [ "public/pw_boot_armv7m/boot.h" ]
+ public = [ "public/pw_boot_cortex_m/boot.h" ]
public_deps = [ "$dir_pw_preprocessor" ]
deps = [
- ":armv7m_linker_script",
+ ":cortex_m_linker_script",
"$dir_pw_boot:facade",
]
sources = [ "core_init.c" ]
diff --git a/pw_boot_armv7m/basic_armv7m.ld b/pw_boot_cortex_m/basic_cortex_m.ld
similarity index 93%
rename from pw_boot_armv7m/basic_armv7m.ld
rename to pw_boot_cortex_m/basic_cortex_m.ld
index e758aa2..69334c5 100644
--- a/pw_boot_armv7m/basic_armv7m.ld
+++ b/pw_boot_cortex_m/basic_cortex_m.ld
@@ -14,44 +14,45 @@
* the License.
*/
-/* This relatively simplified linker script will work with many ARMv7-M cores
- * that have on-board memory-mapped RAM and FLASH. For more complex projects and
- * devices, it's possible this linker script will not be sufficient as-is.
+/* This relatively simplified linker script will work with many ARMv7-M and
+ * ARMv8-M cores that have on-board memory-mapped RAM and FLASH. For more
+ * complex projects and devices, it's possible this linker script will not be
+ * sufficient as-is.
*
* This linker script is likely not suitable for a project with a bootloader.
*/
/* Provide useful error messages when required configurations are not set. */
#ifndef PW_BOOT_VECTOR_TABLE_BEGIN
-#error "PW_BOOT_VECTOR_TABLE_BEGIN is not defined, and is required to use pw_boot_armv7m"
+#error "PW_BOOT_VECTOR_TABLE_BEGIN is not defined, and is required to use pw_boot_cortex_m"
#endif // PW_BOOT_VECTOR_TABLE_BEGIN
#ifndef PW_BOOT_VECTOR_TABLE_SIZE
-#error "PW_BOOT_VECTOR_TABLE_SIZE is not defined, and is required to use pw_boot_armv7m"
+#error "PW_BOOT_VECTOR_TABLE_SIZE is not defined, and is required to use pw_boot_cortex_m"
#endif // PW_BOOT_VECTOR_TABLE_SIZE
#ifndef PW_BOOT_FLASH_BEGIN
-#error "PW_BOOT_FLASH_BEGIN is not defined, and is required to use pw_boot_armv7m"
+#error "PW_BOOT_FLASH_BEGIN is not defined, and is required to use pw_boot_cortex_m"
#endif // PW_BOOT_FLASH_BEGIN
#ifndef PW_BOOT_FLASH_SIZE
-#error "PW_BOOT_FLASH_SIZE is not defined, and is required to use pw_boot_armv7m"
+#error "PW_BOOT_FLASH_SIZE is not defined, and is required to use pw_boot_cortex_m"
#endif // PW_BOOT_FLASH_SIZE
#ifndef PW_BOOT_RAM_BEGIN
-#error "PW_BOOT_RAM_BEGIN is not defined, and is required to use pw_boot_armv7m"
+#error "PW_BOOT_RAM_BEGIN is not defined, and is required to use pw_boot_cortex_m"
#endif // PW_BOOT_RAM_BEGIN
#ifndef PW_BOOT_RAM_SIZE
-#error "PW_BOOT_RAM_SIZE is not defined, and is required to use pw_boot_armv7m"
+#error "PW_BOOT_RAM_SIZE is not defined, and is required to use pw_boot_cortex_m"
#endif // PW_BOOT_RAM_SIZE
#ifndef PW_BOOT_HEAP_SIZE
-#error "PW_BOOT_HEAP_SIZE is not defined, and is required to use pw_boot_armv7m"
+#error "PW_BOOT_HEAP_SIZE is not defined, and is required to use pw_boot_cortex_m"
#endif // PW_BOOT_HEAP_SIZE
#ifndef PW_BOOT_MIN_STACK_SIZE
-#error "PW_BOOT_MIN_STACK_SIZE is not defined, and is required to use pw_boot_armv7m"
+#error "PW_BOOT_MIN_STACK_SIZE is not defined, and is required to use pw_boot_cortex_m"
#endif // PW_BOOT_MIN_STACK_SIZE
diff --git a/pw_boot_armv7m/bloaty_config.bloaty b/pw_boot_cortex_m/bloaty_config.bloaty
similarity index 100%
rename from pw_boot_armv7m/bloaty_config.bloaty
rename to pw_boot_cortex_m/bloaty_config.bloaty
diff --git a/pw_boot_armv7m/core_init.c b/pw_boot_cortex_m/core_init.c
similarity index 96%
rename from pw_boot_armv7m/core_init.c
rename to pw_boot_cortex_m/core_init.c
index c1b7307..c07a6a5 100644
--- a/pw_boot_armv7m/core_init.c
+++ b/pw_boot_cortex_m/core_init.c
@@ -55,7 +55,7 @@
#include <stdint.h>
#include <string.h>
-#include "pw_boot_armv7m/boot.h"
+#include "pw_boot_cortex_m/boot.h"
#include "pw_preprocessor/compiler.h"
// Extern symbols provided by linker script.
@@ -113,8 +113,8 @@
// Call static constructors.
__libc_init_array();
- // This function is not provided by pw_boot_armv7m, a platform layer, project,
- // or application is expected to implement it.
+ // This function is not provided by pw_boot_cortex_m, a platform layer,
+ // project, or application is expected to implement it.
pw_boot_PreMainInit();
// Run main.
diff --git a/pw_boot_armv7m/docs.rst b/pw_boot_cortex_m/docs.rst
similarity index 89%
rename from pw_boot_armv7m/docs.rst
rename to pw_boot_cortex_m/docs.rst
index 909c884..204bb46 100644
--- a/pw_boot_armv7m/docs.rst
+++ b/pw_boot_cortex_m/docs.rst
@@ -1,12 +1,12 @@
-.. _module-pw_boot_armv7m:
+.. _module-pw_boot_cortex_m:
---------------
-pw_boot_armv7m
---------------
+----------------
+pw_boot_cortex_m
+----------------
-The ARMv7-M boot module provides a linker script and some early initialization
-of static memory regions and C++ constructors. This is enough to get many
-ARMv7-M cores booted and ready to run C++ code.
+The ARM Cortex-M boot module provides a linker script and some early
+initialization of static memory regions and C++ constructors. This is enough to
+get many ARMv7-M and ARMv8-M cores booted and ready to run C++ code.
This module is currently designed to support a very minimal device memory layout
configuration:
@@ -25,8 +25,8 @@
Sequence
========
-The high level pw_boot_armv7m boot sequence looks like the following pseudo-code
-invocation of the user-implemented functions:
+The high level pw_boot_cortex_m boot sequence looks like the following
+pseudo-code invocation of the user-implemented functions:
.. code:: cpp
@@ -44,6 +44,13 @@
Setup
=====
+Processor Selection
+-------------------
+Set the ``pw_boot_BACKEND`` variable to the appropriate target for the processor
+in use.
+
+ - ``pw_boot_cortex_m:armv7m`` for ARMv7-M cores.
+
User-Implemented Functions
--------------------------
This module expects all of these extern "C" functions to be defined outside this
@@ -101,14 +108,11 @@
Required Configs
----------------
This module has a number of required configuration options that mold the linker
-script to fit to a wide variety of ARMv7-M SoCs. The ``pw_boot_armv7m_config``
-GN variable has a ``defines`` member that can be used to modify these linker
-script options. See the documentation section on configuration for information
-regarding which configuration options are required.
+script to fit to a wide variety of ARM Cortex-M SoCs.
Vector Table
------------
-Targets using ``pw_boot_armv7m`` will need to provide an ARMv7-M interrupt
+Targets using ``pw_boot_cortex_m`` will need to provide an ARMv7-M interrupt
vector table (ARMv7-M Architecture Reference Manual DDI 0403E.b section B1.5.2
and B1.5.3). This is done by storing an array into the ``.vector_table``
section, and properly configuring ``PW_BOOT_VECTOR_TABLE_*`` preprocessor
@@ -167,7 +171,7 @@
Configuration
=============
These configuration options can be controlled by appending list items to
-``pw_boot_armv7m_LINK_CONFIG_DEFINES`` as part of a Pigweed target
+``pw_boot_cortex_m_LINK_CONFIG_DEFINES`` as part of a Pigweed target
configuration.
``PW_BOOT_HEAP_SIZE`` (required):
diff --git a/pw_boot_armv7m/public/pw_boot_armv7m/boot.h b/pw_boot_cortex_m/public/pw_boot_cortex_m/boot.h
similarity index 100%
rename from pw_boot_armv7m/public/pw_boot_armv7m/boot.h
rename to pw_boot_cortex_m/public/pw_boot_cortex_m/boot.h
diff --git a/pw_sys_io_arduino/BUILD.bazel b/pw_sys_io_arduino/BUILD.bazel
index 08e64b0..c7da849 100644
--- a/pw_sys_io_arduino/BUILD.bazel
+++ b/pw_sys_io_arduino/BUILD.bazel
@@ -26,7 +26,6 @@
srcs = ["sys_io_arduino.cc"],
hdrs = ["public/pw_sys_io_arduino/init.h"],
deps = [
- "//pw_boot_armv7m",
"//pw_preprocessor",
"//pw_sys_io",
],
diff --git a/pw_sys_io_baremetal_lm3s6965evb/BUILD.bazel b/pw_sys_io_baremetal_lm3s6965evb/BUILD.bazel
index 6bcb866..b3ea1c2 100644
--- a/pw_sys_io_baremetal_lm3s6965evb/BUILD.bazel
+++ b/pw_sys_io_baremetal_lm3s6965evb/BUILD.bazel
@@ -30,6 +30,7 @@
"@platforms//os:none",
],
deps = [
+ "//pw_boot_cortex_m:armv7m",
"//pw_preprocessor",
"//pw_sys_io:facade",
],
diff --git a/pw_sys_io_baremetal_lm3s6965evb/BUILD.gn b/pw_sys_io_baremetal_lm3s6965evb/BUILD.gn
index 5ff5e86..1fa0ecf 100644
--- a/pw_sys_io_baremetal_lm3s6965evb/BUILD.gn
+++ b/pw_sys_io_baremetal_lm3s6965evb/BUILD.gn
@@ -25,7 +25,7 @@
public_configs = [ ":default_config" ]
public = [ "public/pw_sys_io_baremetal_lm3s6965evb/init.h" ]
public_deps = [
- "$dir_pw_boot_armv7m",
+ "$dir_pw_boot_cortex_m:armv7m",
"$dir_pw_preprocessor",
]
deps = [
diff --git a/pw_sys_io_baremetal_stm32f429/BUILD.bazel b/pw_sys_io_baremetal_stm32f429/BUILD.bazel
index d48a7cb..d392531 100644
--- a/pw_sys_io_baremetal_stm32f429/BUILD.bazel
+++ b/pw_sys_io_baremetal_stm32f429/BUILD.bazel
@@ -30,7 +30,7 @@
"@platforms//os:none",
],
deps = [
- "//pw_boot_armv7m",
+ "//pw_boot_cortex_m:armv7m",
"//pw_preprocessor",
"//pw_sys_io",
],
diff --git a/pw_sys_io_baremetal_stm32f429/BUILD.gn b/pw_sys_io_baremetal_stm32f429/BUILD.gn
index c611ccb..c9eb3b2 100644
--- a/pw_sys_io_baremetal_stm32f429/BUILD.gn
+++ b/pw_sys_io_baremetal_stm32f429/BUILD.gn
@@ -25,7 +25,7 @@
public_configs = [ ":default_config" ]
public = [ "public/pw_sys_io_baremetal_stm32f429/init.h" ]
public_deps = [
- "$dir_pw_boot_armv7m",
+ "$dir_pw_boot_cortex_m:armv7m",
"$dir_pw_preprocessor",
]
deps = [
diff --git a/targets/arduino/target_toolchains.gni b/targets/arduino/target_toolchains.gni
index e0b5907..dfc9b83 100644
--- a/targets/arduino/target_toolchains.gni
+++ b/targets/arduino/target_toolchains.gni
@@ -32,7 +32,7 @@
get_path_info("arduino_executable.gni", "abspath")
# Path to the bloaty config file for the output binaries.
- pw_bloat_BLOATY_CONFIG = "$dir_pw_boot_armv7m/bloaty_config.bloaty"
+ pw_bloat_BLOATY_CONFIG = "$dir_pw_boot_cortex_m/bloaty_config.bloaty"
if (pw_arduino_use_test_server) {
_test_runner_script =
diff --git a/targets/lm3s6965evb_qemu/target_toolchains.gni b/targets/lm3s6965evb_qemu/target_toolchains.gni
index c52deb2..5293bc4 100644
--- a/targets/lm3s6965evb_qemu/target_toolchains.gni
+++ b/targets/lm3s6965evb_qemu/target_toolchains.gni
@@ -31,13 +31,13 @@
get_path_info("lm3s6965evb_executable.gni", "abspath")
# Path to the bloaty config file for the output binaries.
- pw_bloat_BLOATY_CONFIG = "$dir_pw_boot_armv7m/bloaty_config.bloaty"
+ pw_bloat_BLOATY_CONFIG = "$dir_pw_boot_cortex_m/bloaty_config.bloaty"
pw_unit_test_AUTOMATIC_RUNNER = get_path_info(_test_runner_script, "abspath")
# Facade backends
pw_assert_BACKEND = dir_pw_assert_basic
- pw_boot_BACKEND = dir_pw_boot_armv7m
+ pw_boot_BACKEND = "$dir_pw_boot_cortex_m:armv7m"
pw_log_BACKEND = dir_pw_log_basic
pw_sys_io_BACKEND = dir_pw_sys_io_baremetal_lm3s6965evb
pw_sync_INTERRUPT_SPIN_LOCK_BACKEND =
@@ -51,7 +51,7 @@
# pw_cpu_exception_ENTRY_BACKEND =
# "$dir_pw_cpu_exception_cortex_m:cpu_exception_armv7m
- pw_boot_armv7m_LINK_CONFIG_DEFINES = [
+ pw_boot_cortex_m_LINK_CONFIG_DEFINES = [
"PW_BOOT_FLASH_BEGIN=0x00000200",
"PW_BOOT_FLASH_SIZE=255K",
"PW_BOOT_HEAP_SIZE=0",
diff --git a/targets/lm3s6965evb_qemu/vector_table.c b/targets/lm3s6965evb_qemu/vector_table.c
index a9228c5..d1c24ef 100644
--- a/targets/lm3s6965evb_qemu/vector_table.c
+++ b/targets/lm3s6965evb_qemu/vector_table.c
@@ -14,7 +14,7 @@
#include <stdbool.h>
-#include "pw_boot_armv7m/boot.h"
+#include "pw_boot_cortex_m/boot.h"
// Default handler to insert into the ARMv7-M vector table (below).
// This function exists for convenience. If a device isn't doing what you
@@ -27,7 +27,7 @@
// This is the device's interrupt vector table. It's not referenced in any
// code because the platform (STM32F4xx) expects this table to be present at the
-// beginning of flash. The exact address is specified in the pw_boot_armv7m
+// beginning of flash. The exact address is specified in the pw_boot_cortex_m
// configuration as part of the target config.
//
// For more information, see ARMv7-M Architecture Reference Manual DDI 0403E.b
diff --git a/targets/stm32f429i_disc1/boot.cc b/targets/stm32f429i_disc1/boot.cc
index ca6f78f..b0a5464 100644
--- a/targets/stm32f429i_disc1/boot.cc
+++ b/targets/stm32f429i_disc1/boot.cc
@@ -12,7 +12,7 @@
// License for the specific language governing permissions and limitations under
// the License.
-#include "pw_boot_armv7m/boot.h"
+#include "pw_boot_cortex_m/boot.h"
#include "pw_malloc/malloc.h"
#include "pw_preprocessor/compiler.h"
diff --git a/targets/stm32f429i_disc1/target_docs.rst b/targets/stm32f429i_disc1/target_docs.rst
index 64b4c29..f4ca96b 100644
--- a/targets/stm32f429i_disc1/target_docs.rst
+++ b/targets/stm32f429i_disc1/target_docs.rst
@@ -198,7 +198,7 @@
Type "apropos word" to search for commands related to "word"...
Reading symbols from out/stm32f429i_disc1_debug/obj/pw_assert//test/assert_facade_test.elf...
Remote debugging using :3333
- pw_BootEntry () at ../pw_boot_armv7m/core_init.c:117
+ pw_BootEntry () at ../pw_boot_cortex_m/core_init.c:117
117 }
Step 3: Flash, run, and debug
diff --git a/targets/stm32f429i_disc1/target_toolchains.gni b/targets/stm32f429i_disc1/target_toolchains.gni
index c457ab1..bc28991 100644
--- a/targets/stm32f429i_disc1/target_toolchains.gni
+++ b/targets/stm32f429i_disc1/target_toolchains.gni
@@ -34,7 +34,7 @@
get_path_info("stm32f429i_executable.gni", "abspath")
# Path to the bloaty config file for the output binaries.
- pw_bloat_BLOATY_CONFIG = "$dir_pw_boot_armv7m/bloaty_config.bloaty"
+ pw_bloat_BLOATY_CONFIG = "$dir_pw_boot_cortex_m/bloaty_config.bloaty"
if (pw_use_test_server) {
_test_runner_script = "py/stm32f429i_disc1_utils/unit_test_client.py"
@@ -44,7 +44,7 @@
# Facade backends
pw_assert_BACKEND = dir_pw_assert_basic
- pw_boot_BACKEND = dir_pw_boot_armv7m
+ pw_boot_BACKEND = "$dir_pw_boot_cortex_m:armv7m"
pw_cpu_exception_ENTRY_BACKEND =
"$dir_pw_cpu_exception_cortex_m:cpu_exception_armv7m"
pw_cpu_exception_HANDLER_BACKEND = "$dir_pw_cpu_exception:basic_handler"
@@ -59,7 +59,7 @@
"$dir_pigweed/targets/stm32f429i_disc1:system_rpc_server"
pw_malloc_BACKEND = dir_pw_malloc_freelist
- pw_boot_armv7m_LINK_CONFIG_DEFINES = [
+ pw_boot_cortex_m_LINK_CONFIG_DEFINES = [
"PW_BOOT_FLASH_BEGIN=0x08000200",
"PW_BOOT_FLASH_SIZE=1024K",
diff --git a/targets/stm32f429i_disc1/vector_table.c b/targets/stm32f429i_disc1/vector_table.c
index a9228c5..d1c24ef 100644
--- a/targets/stm32f429i_disc1/vector_table.c
+++ b/targets/stm32f429i_disc1/vector_table.c
@@ -14,7 +14,7 @@
#include <stdbool.h>
-#include "pw_boot_armv7m/boot.h"
+#include "pw_boot_cortex_m/boot.h"
// Default handler to insert into the ARMv7-M vector table (below).
// This function exists for convenience. If a device isn't doing what you
@@ -27,7 +27,7 @@
// This is the device's interrupt vector table. It's not referenced in any
// code because the platform (STM32F4xx) expects this table to be present at the
-// beginning of flash. The exact address is specified in the pw_boot_armv7m
+// beginning of flash. The exact address is specified in the pw_boot_cortex_m
// configuration as part of the target config.
//
// For more information, see ARMv7-M Architecture Reference Manual DDI 0403E.b