align f16 buffers in SkRasterPipeline_tail test

The load_f16 and store_f16 stages are assuming they can load
each pixel at a time with 8 byte alignment, but as declared
the buffers are only guaranteed 2 byte alignment.

Bug: skia:7497

Change-Id: I47b29f13b48f90d2b15540979c3d87ba25dcc506
Reviewed-on: https://skia-review.googlesource.com/110321
Reviewed-by: Kevin Lubick <kjlubick@google.com>
Commit-Queue: Mike Klein <mtklein@chromium.org>
4 files changed