add SK_CPU_SSE_LEVEL, which may be defined to 2 or 3 (or 41 or 42 in the future)
to tell us at compile-time what SSE instructions are available. If none are
known to be available (though we still can check at runtime) SK_CPU_SSE_LEVEL
will be undefined.
git-svn-id: http://skia.googlecode.com/svn/trunk@4419 2bbb7eff-a529-9590-31e7-b0007b416f81
diff --git a/include/core/SkPreConfig.h b/include/core/SkPreConfig.h
index ff19806..22601a7 100644
--- a/include/core/SkPreConfig.h
+++ b/include/core/SkPreConfig.h
@@ -102,6 +102,20 @@
//////////////////////////////////////////////////////////////////////
+/**
+ * If defined, SK_CPU_SSE_LEVEL should be set to [2,3,41,42]. On non-intel CPU,
+ * this should be undefined.
+ */
+#ifndef SK_CPU_SSE_LEVEL
+ #ifdef __SSE3__
+ #define SK_CPU_SSE_LEVEL 3
+ #elif defined(__SSE2__)
+ #define SK_CPU_SSE_LEVEL 2
+ #endif
+#endif
+
+//////////////////////////////////////////////////////////////////////
+
#if (defined(__arm__) && !defined(__thumb__)) || defined(SK_BUILD_FOR_WINCE) || (defined(SK_BUILD_FOR_SYMBIAN) && !defined(__MARM_THUMB__))
/* e.g. the ARM instructions have conditional execution, making tiny branches cheap */
#define SK_CPU_HAS_CONDITIONAL_INSTR